email@example.com (David Johns) (04/24/89)
Electrical Engineering Electronic Group Seminar VLSI Architectural Synthesis for DSP Applications Baher Haroun Department of Electrical Engineering University of Waterloo Time: Friday, April 28, 1989, 14:00 --- Place: SF 1101 ABSTRACT Many high performance DSP systems such as HiFi audio, telecommunication and image processing can be implemented in VLSI. The design complexity and the large number of architectural alternatives necessitates the automation of architecture design. Architectural synthesis makes the design task less error prone, allows fast prototyping, explores a wide architecture space, facilitates design changes, and can result in more efficient hardware. In this talk, the state of the art architecture synthesis tools will be overviewed. A high performance architectural synthesis tool for DSP, SPAID, will be presented. SPAID synthesizes processors with synchronous multiple bus data path architectures and asynchronous interfaces from signal flow graph algorithm specification. The processors synthesized by SPAID are suited for multiprocessor implementation of DSP systems. The advantages of SPAID synthesis methodology over others will be demonstrated through benchmark examples. The use of SPAID in the design of HiFi stereo filter DSP chip will also be presented.