[ut.ee] AWSIM-3 :cider Friday 17th - David Lewis

dunc@eecg.toronto.edu (Duncan Elliott) (11/15/89)

                Electrical Engineering Computer Group
                         Cider Seminar Series

           AWSIM-3: A High Performance Hardware Accelerator
                        for Circuit Simulation

                                  by
                             David Lewis
                Electrical Engineering Computer Group
                        University of Toronto

         Time: Friday, Nov. 17, 1989, 12:05 --- Place: GB 248

       Awsim-3 is a hardware accelerator for electrical simulation  of
  VLSI  circuits,  designed to support a variety of algorithms ranging
  from SPICE-style direct circuit  simulation  to  timing  simulation.
  While  other  hardware accelerators have used an interpretive model,
  with the processor interpreting a data structure that represents the
  problem,  Awsim  uses  a  different  organization.   Awsim-3  uses a
  compiled model, where each circuit is compiled into executable  code
  for  the  machine.  This  technique  has  three  primary advantages.
  First, it makes the hardware simple, since  little  of  the  problem
  solution  is  hardwired. Second, it improves performance, since many
  operations  can  statically  be  eliminated.  Third,  it  makes  the
  processor  more general, since little of the hardware is specific to
  the problem being solved.

       This talk will present the  motivations  for  Awsim-3,  and  an
  overview  of  the hardware under construction. It will also describe
  the software used to achieve effective use of the hardware with  low
  preprocessing  overhead.  Specific performance data showing that the
  machine is a factor of 1500 to 3000 times  faster  than  a  Sun-3/60
  will be presented.

                             Coming Soon

 Date          Who                               Topic

Nov. 24   Duncan Elliott   IRAM
Jan. 19   Pierre Delisle   A Load Balancing Facility for Distributed Systems