[comp.archives] [handhelds] Re: Chip 48 v2.25 question

gson@blob.hut.fi (Andreas Gustafsson) (04/05/91)

Archive-name: sys/hp48/chip-48/1991-04-04
Archive-directory: vega.hut.fi:/pub/misc/hp48sx/asap/ [130.233.200.42]
Original-posting-by: gson@blob.hut.fi (Andreas Gustafsson)
Original-subject: Re: Chip 48 v2.25 question
Reposted-by: emv@msen.com (Edward Vielmetti, MSEN)

In article <4741@gumby.Altos.COM> steve@altos.COM (Steve Scherf) writes:
: I have an esoteric question about two instructions in the Chip48 machine
: code.
:
: In the original document from gson@niksula.hut.fi there is a one-line
: description of each of the instructions and their opcodes. Two in particular
: are described ambiguously; these are the instruction to do a left shift one
: bit and the analogous instruction to do a right shift. The documentation 
: states that the opcode for a right shift of register VX is 8XY6 where X 
: is the hex digit after the 'V' in VX. That's all fine and dandy, but 
: what's 'Y'?

It's can be anything; the interpreter doesn't use it.  It appears
that you are using the version 2.20 documentation; in 2.25 the opcode
is called "8X06" to avoid unnecessary confusion.

: Also, not actually having written a chip 48 program yet, can anyone tell 
: me what the byte ordering for a two byte instruction is? Is it big-endian 
: like sprites?

Yes.  For instance, the 8106 instruction (shift V1 right) is stored as
the bytes 81 and 06, where 81 is at the lower address.  This
translates into the nibbles 1 8 0 6, in increasing address order.

As a reminder to all, the official CHIP-48 FTP location is still
vega.hut.fi:/pub/misc/hp48sx/asap/*.
-- 
Andreas Gustafsson
Internet: gson@niksula.hut.fi
Voice: +358 0 563 5592