jjh@XN.LL.MIT.EDU (James J. Hunt) (06/13/90)
Would anyone care to comment on the relative advantages and disadvantages of the Motorola 88100/88200 and the Intel i860 for a shared memory multiprocessor running MACH. I would like to hear how well each processor is suited to MACH and memory sharing within a MACH task; and what this means for system performance. I have my own prejudices on this matter, but I would like to hear from people with some experience with either of these chips and/or MACH. Thanks, JJHunt P.S. I am not interested in starting a processor war. I just would like to hear comments to the effect of feature W on processor X is good/bad because Y and might have Z effect on performance in such a system. If you have had some experience with both chips, I would also like to hear about it.
tommyk@cs.glasgow.ac.uk (Tommy Kelly) (06/14/90)
In article <1890@xn.LL.MIT.EDU> jjh@XN.LL.MIT.EDU (James J. Hunt) writes: >Would anyone care to comment on the relative advantages and disadvantages of >the Motorola 88100/88200 and the Intel i860 for a shared memory >multiprocessor running MACH. Some researchers at the Swedish Institute of Computer Science (SICS) are using the 88100/88200 in a MACH (I believe) machine. Their 'DATA DIFFUSION MACHINE' uses the write-once aspect of the 200's cache coherency mechanism to allow snarfing. This, they say, allows the machine to act as a shared memory system to the programmer, but as a message passing system to the data coherency mechanisms. There was a report about the DDM in a recent Comp. Arch. News, written by Erik Hagersten of SICS. I don't know how the 860 scores on this, but the SICS guys checked out a number of processors and found that the 88K was the only architecture suitable. I can try to find more details if you want. tk
jkenton@pinocchio.encore.com (Jeff Kenton) (06/14/90)
From article <1890@xn.LL.MIT.EDU>, by jjh@XN.LL.MIT.EDU (James J. Hunt): > Would anyone care to comment on the relative advantages and disadvantages of > the Motorola 88100/88200 and the Intel i860 for a shared memory > multiprocessor running MACH. I would like to hear how well each processor > is suited to MACH and memory sharing within a MACH task; and what this means > for system performance. I have my own prejudices on this matter, but I > would like to hear from people with some experience with either of these > chips and/or MACH. > You can certainly run MACH on the 88000 -- it's been/being done in several places. I don't know what the i860 provides for atomic locking of memory, which any multiprocessor implementation would use. That, and the question of flexible memory allocation in the MMUs, are the only serious requirements you would need for multi-processor MACH. Other aspects of the chips will affect the ease of the port, but not whether it's possible. For "ease", the 88000 is straightforward but RISCy. The exception handling, in particular, requires some care. An atomic XMEM instruction provides locking. Don't remember what it takes to do locking on the i860. It looks like some of the low level exception handling (especially the floating point stuff) could be amusing. The 88000 has been fun to work with (twice!). I'm sure some i860 fans will tell their side of the story. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - jeff kenton --- temporarily at jkenton@pinocchio.encore.com - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
deraadt@enme.ucalgary.ca (Theo &) (06/15/90)
In article <5473@vanuata.cs.glasgow.ac.uk> tommyk@cs.glasgow.ac.uk (Tommy Kelly) writes: > I don't know how the 860 scores on this, but the SICS guys checked out > a number of processors and found that the 88K was the only architecture > suitable. Of course, the 68040 is in this catagory now too, as long as code cache coherency is not broken by the same processor. No? <tdr. -- SunOS 4.0.3: /usr/include/vm/as.h, Line 44 | Theo de Raadt Is it a typo? Should the '_' be an 's'?? :-) | deraadt@enme.ucalgary.ca