t-jacobs@wasatch.UUCP (Tony Jacobs) (10/20/88)
Can anyone list the 12 DMA channels without guessing? -- Tony Jacobs * Center for Engineering Design * U of U * t-jacobs@ced.utah.edu
casey@admin.cognet.ucla.edu (Casey Leedom) (10/20/88)
| From: t-jacobs@wasatch.UUCP (Tony Jacobs) | | Can anyone list the 12 DMA channels without guessing? This is an excerpt from the BYTE BIX article. It's the most authoritative assertion I've heard yet on what the twelve DMA channels are allocated to. The BYTE BIX article is one of the best sources for information that I've seen so far. People should read it before submitting questions. | From: kr0k+@andrew.cmu.edu (Kenton Arthur Radek) | Author: Tom Thompson and Nick Baran | Subject: FIRST IMPRESSIONS -- The NeXT Computer | | NeXT's third design strategy was to improve data throughput within the | system itself by managing these transfers with custom DMA hardware. This | DMA hardware is implemented in one of the same VLSI chips that helps | manage the system I/O. There are no less than 12 DMA channels on the main | CPU board. They include the following: | | * two Ethernet channels (one for transmitted data, one for received data), | * one video channel, | * one serial channel (for both serial ports), | * one DSP channel, | * two disk channels (one for the magneto-optical drive, one for a SCSI hard | disk drive), | * one printer channel, | * one memory-to-DMA register channel, | * one DMA register-to-memory channel, and | * two sound channels (one for input, one for output). | | For the memory-to-register and register-to-memory DMA channels, | "register" corresponds to a 16-byte register buffer in the DMA hardware. | The contents of these registers can be copied repeatedly under DMA | control to memory. An example of this would be to copy a background | pattern for the video display into the DMA registers, and then use the | register-to-memory DMA channel to copy the pattern into all of the video | memory. Casey