[comp.sys.next] Does NeXT have parity/ECC protected memory?

casey@CS.UCLA.EDU (10/18/88)

  It's been hinted at a couple of times that NeXT doesn't have any error
detection on main memory.  Is this true?  If so, what was the rationale
not to put it in?  (I would assume cost vs. functionality.)  If not, what
kind of error detection[/correction] is being used?  (I would assume
parity for reasons of cost/complexity.)

  Also, what specific SIMMs are being used?  Someone claimed 1Mx32 bit,
with 16 sockets on the board, but that would give you 64Mbytes.  I'm also
unaware that there are 1Mx32 parts, but since my exposure to SIMMs is
minimal, that could certainly be all my fault.

Casey

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henry@utzoo.uucp (Henry Spencer) (10/26/88)

In article <16901@shemp.CS.UCLA.EDU> casey@CS.UCLA.EDU (Casey Leedom) writes:
>  It's been hinted at a couple of times that NeXT doesn't have any error
>detection on main memory.  Is this true?  If so, what was the rationale
>not to put it in? ...

Probably because modern memory chips are much more reliable than the 4Kb
and 16Kb clunkers that caused the rush to error correction.
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