paul@unisoft.UUCP (n) (10/29/88)
I finally managed to get a look at the byte article about the Next machine and I have to retract some of what I said about relative speeds of NuBuses (and apologise to the guy from Nat Semi who mailed me - I forgot your address) what Next have done is really quite neat. Onboard their system board they do not run seperate data and address buses, instead they are multiplexed (just like the NuBus) and, I assume, have the same timings as the NuBus, this means that building the bus interface is quite trivial as all the bits are already in the correct place. This internal bus runs in burst mode, they say it takes 9 25MHz clock cycles for a 4 word burst which I assume is used like this: <address> <wait> <wait> <wait> <wait> <data> <data> <data> <data> 0 1 2 3 4 5 6 7 8 9 which is do able with nibble drams, note the 4 <wait> states @25MHz imply 160Ns access times on the drams. This means that they could run it a little faster (there must be some slack in there for decoding/buffers etc) say 8 clock cycles/120Ns. This means that the total cycle time is 360Ns so they could run 2 every uS (memory cycle time has to be taken into account) and get a total bus bandwidth of around 2*4*4=32Mb/S without trying hard. Extending it out onto a NuBus might cost them an extra cycle but because the internal architecture matches the bus architecture so closely it wont be much. I think another good reason for using a multiplexed bus is that it probably gets the pin count down on the DMA gate array. It seems to also be the dram controller, reading 68030 addresses off the data bus and doing ras/cas onto an 11 bit address bus (does this mean they can't handle 16Mb chips?, does it matter?) which drives both the main RAM and the video RAM (I like this - it makes sense no one is going to access both video RAM and main memory at the same time). Also of interest is the picture of the board, in the top right corner is an empty pga socket my guess is that this is for the NuBus interface which is <not finished yet>/<costs extra>/<not availaable in quantity> you take your pick. There is only one ROM on the board, only used for booting, 8bit, 128K but socketed in a socket with 4 extra pins .... (for some wierd reason the traces going to this chip are much larger than any other on the board??). The byte article points out '32k bytes of static RAM' in the middle of the board but looking closer makes me think that it's really 8kx24 for the DSP chip and 8kx8 for the optical disks, they just put them near each other. As I was with the Mac 2, I'm impressed with how 'empty' the board looks. Paul -- Paul Campbell, UniSoft Corp. 6121 Hollis, Emeryville, Ca ..ucbvax!unisoft!paul Nothing here represents the opinions of UniSoft or its employees (except me) "Where was George?" - Nudge, nudge say no more