patterso@hardees.rutgers.edu (Ross Patterson) (11/02/88)
In article <7493@well.UUCP>, ejf@well.UUCP (Erik James Freed) writes: > I think it was Seymour Cray who was quoted as saying > "Parity is for farmers" A strange attitude, given that his machines spew out data at a rate far beyond the abilities of mere mortals to validate. Ever watch the output of a dynamic molecular modeling run? Dumping the contents of a multi-megabyte array every thousand or so iterations, over a 100,000+ iteration run produces more than a few numbers. Does Cray want to be the one to go through them one by one and check that they didn't get corrupted by a passing subatomic particle (or just a weak DRAM chip)? > I would tend to support NeXT's decision. Parity is supposed to allow > you to pinpoint where errors reside, but the software is rarely written > so that information is easily available. Parity also allows your hardware to correct the error, and inform you of it later. You *CAN* have your cake and eat it too. Systems I've worked with before have had SC/DD (Single-bit Correct, Double-bit Detect) hardware that informs the error logger of exactly which chip on which memory board got nailed. The SC hardware lets you get your data out, and in theory points out the problem before the chip deteriorates into causing a DD (which doesn't get the data out). I understand that IBM's 3090 series has Double-bit Correct/Triple-bit Detect logic. Neato. > In general if your system memory > is flakey, you will soon realize that something is up and then you can > run memory tests to isolate the particular simm module. (I assume that a > good memory checking diagnostic will be available at a standalone level > for the NeXT) A useable (thorough) memory test takes a lot of time. It is > not something that you want to run every boot up. That's why continual parity checking is so nice. You don't have to run a thorough memory test at every startup, only when you've logged an unacceptable number of errors. I agree that a real good beating on the NeXT's standard 8MB would take much longer than the average user would want to wait. But do you think that IBM's 3090 customers run one over all 1024MB of real memory at every startup (yes, the largest 3090 can have over a gigabyte of RAM)? > And parity memory in > my experience just is not really that useful. (at least to justify the PC > real estate) Perhaps not. But that's a decision for the person using the machine, not the manufacturer. Joe Owner, running the accounts receivable for his Subchapter S corporation, Small Business Inc., no doubt feels that he's entitled to accurate data. If Itty Bitty Machines feels that the machine they designed for game use doesn't need parity, that's probably all the use it will get. The need for reliable data has absolutely no relation to the size of the machine. And just as a sideline, I doubt JoBS would appreciate your calling the NeXT a PC anymore than Bill Joy would like you to call a Sun 3/60 a PC. Ross Patterson Rutgers University, CCIS
bob@allosaur.cis.ohio-state.edu (Bob Sutterfield) (11/03/88)
In article <Nov.2.10.35.53.1988.1589@hardees.rutgers.edu> patterso@hardees.rutgers.edu (Ross Patterson) writes: >In article <7493@well.UUCP>, ejf@well.UUCP (Erik James Freed) writes: >>And parity memory in my experience just is not really that useful. >>(at least to justify the PC real estate) > >...I doubt JoBS would appreciate your calling the NeXT a PC anymore >than Bill Joy would like you to call a Sun 3/60 a PC. First off, Mr Freed was probably using PC to refer to a printed circuit board, of which there is always limited area. Secondly, not all personal computers are made by IBM. The term "PC" was in use long before IBM arrogated its meaning (cf semiannual history discussions in comp.sys.misc or somewhere (I always Kill them early)), just as the term "hacker" was in use long before the media corrupted its meaning. "PC" used to mean something that Alan Kay would like. Now it connotes something he'd probably avoid. Makers of workstations would probably feel gratified if people viewed them as personal computers, in the classical sense. -=- Zippy sez, --Bob On the road, ZIPPY is a pinhead without a purpose, but never without a POINT.
jr@bbn.com (John Robinson) (11/03/88)
In article <Nov.2.10.35.53.1988.1589@hardees.rutgers.edu>, patterso@hardees (Ross Patterson) writes: > I understand that IBM's 3090 series has Double-bit >Correct/Triple-bit Detect logic. Neato. No, I think hype. IBM's game is confidence in their product, and I am sure this sells in their customer base a lot. A DRAM failure takes out one bit per word, and if you pay attention at all to the correction logs you should get the memory chip or board fixed long before two DRAMs in the same bank fail, or do 3090's build their gigabyte out of 16k's :-) ? On the other hand 4kby256 chips might plausibly want 4-bit-correction, for which the cost would make even IBM's customer cringe. I agree that parity/edac ought to be available, and it'll probably come along eventually by third party or whatever. -- /jr jr@bbn.com or bbn!jr
ejf@well.UUCP (Erik James Freed) (11/04/88)
In article <Nov.2.10.35.53.1988.1589@hardees.rutgers.edu> patterso@hardees.rutgers.edu (Ross Patterson) writes: >Parity also allows your hardware to correct the error, and inform you of it >later. You *CAN* have your cake and eat it too. Systems I've worked with The point was that parity as generally implemented does *not* correct the error. It just informs you of it usually without any useful information. It would really make this machine expensive to add things like ECC. >machine. And just as a sideline, I doubt JoBS would appreciate your calling >the NeXT a PC anymore than Bill Joy would like you to call a Sun 3/60 a PC. I have always understood the term PC to stand for "personal computer". I think that steve would like to think that his computer is designed to be the sort of user friendly companion that the personal computer is supposed to eventually be. He did call it a "partner in thought". This sounds pretty personal to me. :-) Erik
casey@admin.cognet.ucla.edu (Casey Leedom) (11/04/88)
| From: jr@bbn.com (John Robinson) | | I agree that parity/edac ought to be available, and it'll probably come | along eventually by third party or whatever. Uh, how are you going to add parity or ecc on as a third party option? Personally, I don't think that it's too late to get some minor redesigns into the machine before it hits the floor next Spring. I think that putting parity on the memory is a top priority along those lines. I don't think that ecc is necessary - I just want to know within a reasonable degree of confidence that my data is correct. Other items might be: o Going with the Sony optical disk instead of the Canon because of its higher performance and conformance to ANSI standards (anyone have any data on the storage capacity of the Sony disk?). o Putting a better input A/D system on it, say 16 bits, so we can do sound sampling for use in synthesis projects (I have absolutely no objects to the voice-mail, or any other voice communication software truncating this down to 8 bits to save on storage). I view these as features I'd really like to see. I view memory parity as a must. Casey
jewett@hpl-opus.HP.COM (Bob Jewett) (11/05/88)
> Today's memory is VERY reliable and (he said) it virtualy never fails one > cell at a time; usually the entire bank or group of banks fail. This is not correct. Present commercial 1 meg DRAMs often have one-bit soft errors. In this context, often means about once per year on a system that has 32 meg of RAM. > The logic used for parity checking can introduce more errors into the > system if it should fail. Due to the types of circuits involved, the parity checking system is much less likely to introduce errors than the memory itself. > Implementing parity on a system slowes the system down. With 100ns memories > and 200ns to compute parity, one cannot run a system as fast as without > parity. This is also not correct. Parity checking can be pipelined, so that the parity checker stops the system within 200 ns if an error occurs, but no delay is introduced for error-free accesses. At any rate, parity checking on either nine or 33 bits, using 74AS280 TTL circuits takes less than 20 nanoseconds. Bob Jewett (see previous response for disclaimer)
lyman@eos.UUCP (Lyman Taylor) (11/07/88)
In article <17548@shemp.CS.UCLA.EDU> casey@cs.ucla.edu (Casey Leedom) writes: > > Personally, I don't think that it's too late to get some minor >redesigns into the machine before it hits the floor next Spring. I think > > Other items might be: > > o Going with the Sony optical disk instead of the Canon because > of its higher performance and conformance to ANSI standards > (anyone have any data on the storage capacity of the Sony > disk?). This would not be minor. One of the "mainframe" VLSI chips serves as a disk controller for the op drive. This is why NeXT can sell the WHOLE cube for a couple thousand $ more the the Sony Drive. ( sony drive 4 or 5 thousand : Cube 6500 ) { This info comes from a NeXT Rep I heard last Wed. at Stanford } Part of being on the frontier means you get arrows in your back. > o Putting a better input A/D system on it, say 16 bits, so we can > do sound sampling for use in synthesis projects (I have > absolutely no objects to the voice-mail, or any other voice > communication software truncating this down to 8 bits to save > on storage). Suppositly, there are boxes coming which will attach to the DSP port on the board for doing "good" sound from third parties. These will probably show up next spring or summer. Lyman S. Taylor lyman@eos.arc.nasa.gov NASA Ames Research Center or more verbose ...{uunet,hplabs,decwrl}!ames!eos!lyman
dhsu@crunchyfrog.Sun.COM (David Hsu) (11/08/88)
In article <1868@eos.UUCP> lyman@eos.UUCP (Lyman Taylor) writes: >In article <17548@shemp.CS.UCLA.EDU> casey@cs.ucla.edu (Casey Leedom) writes: >> o Going with the Sony optical disk instead of the Canon because > > This would not be minor. One of the "mainframe" VLSI chips serves > as a disk controller for the op drive. This is why NeXT can sell the > WHOLE cube for a couple thousand $ more the the Sony Drive. > ( sony drive 4 or 5 thousand : Cube 6500 ) > { This info comes from a NeXT Rep I heard last Wed. at Stanford } I don't buy it. As I recall, the Canon drive itself was meant to sell for $6000 anyway before Jobs bargained the hell out of them. Do you really mean to say that the controller design makes up the difference between that and the (possibly low) $1495 Unix World quotes for a second optical drive? -dave David Hsu dhsu@sun.com <standard disclaimer> "I feel better already knowing that Sherlock Holmes is British."
landman%hanami@Sun.COM (Howard A. Landman) (11/19/88)
In article <8794@spl1.UUCP> patterso@hardees.rutgers.edu (Ross Patterson) writes: >Parity also allows your hardware to correct the error, and inform you of it >later. You *CAN* have your cake and eat it too. Systems I've worked with >before have had SC/DD (Single-bit Correct, Double-bit Detect) hardware that >informs the error logger of exactly which chip on which memory board got >nailed. The SC hardware lets you get your data out, and in theory points out >the problem before the chip deteriorates into causing a DD (which doesn't get >the data out). I understand that IBM's 3090 series has Double-bit >Correct/Triple-bit Detect logic. Neato. You're confusing parity with more complicated error detection/correction schemes. Parity is adding one bit, and gives you SED (single-error detection). It does not allow for any correction, since you have no way of knowing which bit is wrong (it might even be the parity bit). SEC/DED requires a larger overhead, and DEC/TED even more. Howard A. Landman landman@hanami.sun.com UUCP: sun!hanami!landman