hastings@pine.Berkeley.EDU (Mark Hastings) (04/11/89)
I am hoping that someone can provide a little detailed information about the specifications of NeXT's "mainframe on a chip." In particular, I know that there are 12 DMA channels, which together can take up to 40% of the memory bandwidth. What I wanted to find out was: 1. What the total memory bandwidth is. 2. What percentage of the 40% is allocated to each of the 12 channels. I recall seeing a slide at one of the presentations which gave the breakdown, but I didn't think to copy it down. Thanks, Mark Hastings hastings@ernie.berkeley.edu ..!ucbvax!ernie!hastings