lane@sumex-aim.stanford.edu (Christopher Lane) (03/24/90)
\begin{opinion}
NeXT's next machine should consist, minimally, of a new CPU board, new optical
drive and additional hard disk offerings, housed in the current cube. The CPU
should be based on the new IBM RISC chip used in the recently announced
RS/6000 line and contain the current (or improved) sound, Ethernet, optical
driver and other specialized NeXT chips. It should perform at between 20 & 30
MIPS.
To provide for users of the new cube, users of NeXTStep on AIX and to users of
the original cube, NeXT should take advantage of the elegance of the MACH
object file format and store the executable code for both the 68030 and the
RISC chip in separate TEXT segments, sharing common DATA, NIB, etc. segments
and allow the same binary to execute on all three platforms.
The compiler and 'make' would need to be set up to generate/cross-compile both
types of code for finished applications. This would require more disk space
(actually, because of the large page size NeXT uses, most of the standard Unix
routines, like 'who', don't use half their object code space so a smaller page
size would allow them to store both types of object code with little space
penalty when compared with the current machine--but this change is unlikely).
Though I don't believe the additional disk space required to accommodate this
change to be too great, I also believe that NeXT could make the 660MB drive
the smallest in their 'disk full' line (with appropriate price adjustments
downwards), drop the 330MB drive and introduce a 1.2GB drive. In addition,
they could introduce a new optical drive that can read current optical disks
but also handle a new double sided optical disk with ~ 512MB capacity.
I believe they should also publish a 3 1/2 floppy data standard (if not
produce a drive) for 3rd party vendors to use to guarantee compatibility of
floppies no matter whose drive you buy. (Cross vendor compatibility may
already be the case, I don't know.)
\end{opinion}
Disclaimer: This is all opinion based on what is possible, not what may be
taking place. I've nothing to do with NeXT except that I'm a loyal user and
where I live just happens to be share the same ZIP code (though they never
invite me over to visit).
- Christopher
-------sullivan@aqdata.uucp (Michael T. Sullivan) (03/24/90)
:From article <1378@shelby.Stanford.EDU>, by lane@sumex-aim.stanford.edu (Christopher Lane): > > The CPU should be based on the new IBM RISC chip used in the recently announced > RS/6000 line and contain the current (or improved) sound, Ethernet, optical Jobs may license NextStep to IBM but I doubt he's going to let NeXT depend on IBM for the CPU. -- Michael Sullivan uunet!jarthur!aqdata!sullivan aQdata, Inc. sullivan@aqdata.uucp San Dimas, CA +1 714 599 9992
rogerj@batcomputer.tn.cornell.edu (Roger Jagoda) (03/24/90)
In article <1378@shelby.Stanford.EDU> lane@sumex-aim.stanford.edu (Christopher Lane) writes: > >\begin{opinion} --me too! -- > >NeXT's next machine should consist, minimally, of a new CPU board, new optical >drive and additional hard disk offerings, housed in the current cube. The CPU >should be based on the new IBM RISC chip used in the recently announced >RS/6000 line and contain the current (or improved) sound, Ethernet, optical >driver and other specialized NeXT chips. It should perform at between 20 & 30 >MIPS. A few more details: While it doesn't have to be the IBM RS chip, I REALLY think it should be MIPS' new R4000 series as their compiler and VSLI technology is MUCH better than IBM's, but I don't want to start a "whose RISC is better" war so.....suffice it to say that it probably should be some kind of RISC with optimized compilers...what does Stallman like these days? The sound chip BETTER be Motorola's new 98000 series. Much better functionality and 56001 compatible. Ethernet chips are getting faster, cheaper...good! SCSI should support SCSI II or better, liscence SUN IDI...much faster. Finish the EMBIC chip please. I know this is silly, but it REALLY would be nice to have TWO Optical Drives, double sided (512MB) so that copying ODs no longer takes two cubes! All this should be AT LEAST 25 mips for under 9K....not too much to ask for these days, especially for a visionary like Steve! >Though I don't believe the additional disk space required to accommodate this >change to be too great, I also believe that NeXT could make the 660MB drive >the smallest in their 'disk full' line (with appropriate price adjustments >downwards), drop the 330MB drive and introduce a 1.2GB drive. In addition, >they could introduce a new optical drive that can read current optical disks >but also handle a new double sided optical disk with ~ 512MB capacity. Agreed, anything that comes almost 70% full is probab;y too small. 1.2G is NOT that much when you think about it and drive technology is cheaper faster all the time. Also, the new cube should come standard with 16MB RAM instead of 8 as SIMM prices keep falling and the cube is so good at memory managment anyway. --Roger Jagoda --Cornell University --FQOJ@CORNELLA.CIT.CORNELL.EDU
fischer@iesd.auc.dk (Lars P. Fischer) (03/24/90)
In article <1378@shelby.Stanford.EDU> lane@sumex-aim.stanford.edu (Christopher Lane) writes: > The CPU >should be based on the new IBM RISC chip used in the recently announced >RS/6000 line ... Why? A chip like the SPARC is available from many sources, while the IBM chip is available only from a major competitor. Or use any of the other RISC chips. I'd much prefer to buy my chips from Moto or MIPS or some such ... What makes you think that the IBM chips are superior to the i860 or the 88k? Not that it's really an issue. o you really believe that IBM will let you get their chip? Did you ever see IBM selling RAM chips? Any other kind of chips? > It should perform at between 20 & 30 >MIPS. 50 MHz 68040 will do nicely. /Lars -- Lars Fischer, fischer@iesd.auc.dk | Q: How does a project get to be one CS Dept., Univ. of Aalborg, DENMARK. | year late? A: One day at a time.
eps@toaster.SFSU.EDU (Eric P. Scott) (03/24/90)
Hey kids! RISC architecture may be faster on simple benchmarks, but let's get realistic: it's a *memory hog*. Your performance is going to suck without a lot more RAM than you're probably willing to pay for, faster backing store than you can afford, plus you're going to need more disk space for all your executables, even with everything linked against shared libraries. RISCs are great for *dedicated* processors (like file servers and network switches). They're a poor design choice for general-purpose multiprogramming workstations like the NeXT, and just plain unhappy in virtual memory environments. It's a solution for a different problem, not a panacea. -=EPS=-
melling@cs.psu.edu (Michael D Mellinger) (03/24/90)
In article <424@toaster.SFSU.EDU> eps@toaster.SFSU.EDU (Eric P. Scott) writes:
Hey kids! RISC architecture may be faster on simple benchmarks,
but let's get realistic: it's a *memory hog*. Your performance
is going to suck without a lot more RAM than you're probably
willing to pay for, faster backing store than you can afford,
plus you're going to need more disk space for all your
executables, even with everything linked against shared
libraries. RISCs are great for *dedicated* processors (like
file servers and network switches). They're a poor design choice
for general-purpose multiprogramming workstations like the NeXT,
and just plain unhappy in virtual memory environments. It's a
solution for a different problem, not a panacea.
-=EPS=-
I thought the jury was already in on this and RISC was the winner!
How much bigger are the executables for RISC? Memory is cheap and
getting cheaper. 16Mb chips are on the horizon and so are higher
capacity flopticals. As far as performance goes, the major players in
the workstation market have moved to RISC so it must be the right
answer(they're betting their futures on it). The MIPS R4000 is
suppose to execute 50mips at 25Mhz. That's performance!! And what is
RISC missing that makes it a poor performer in virtual memory
environments?
-Mikefischer@iesd.auc.dk (Lars P. Fischer) (03/24/90)
In article <424@toaster.SFSU.EDU> eps@toaster.SFSU.EDU (Eric P. Scott) writes: >Hey kids! RISC architecture may be faster on simple benchmarks, >but let's get realistic: it's a *memory hog*. Your performance >is going to suck without a lot more RAM than you're probably >willing to pay for, faster backing store than you can afford, >plus you're going to need more disk space for all your >executables, even with everything linked against shared >libraries. SPARC binaries are in general 25% larger than 68k (Sun-3) binaries. With RAM prices down to $200/4M, who cares? >RISCs are great for *dedicated* processors (like >file servers and network switches). They're a poor design choice >for general-purpose multiprogramming workstations like the NeXT, >and just plain unhappy in virtual memory environments. Did you ever use a RISC based workstation? If RISC is really a bad choice for a workstation, why then have all the major vendors introduced RISC workstations? Why do they consistently perform better? (no, I'm not talking benchmarks, I'm talking run time for compilers, LaTeX, etc, and simply the general feel of the thing). If you can point to any specific problem with RISC vs. multiprogramming or RISC vs. virtual memory, I'd be glad to hear about it. /Lars -- Lars Fischer, fischer@iesd.auc.dk | Q: How does a project get to be one CS Dept., Univ. of Aalborg, DENMARK. | year late? A: One day at a time.
awang@isl.Stanford.EDU (Avery Wang) (03/24/90)
In article <Eqe#zm3@cs.psu.edu> melling@cs.psu.edu (Michael D Mellinger) writes: >answer(they're betting their futures on it). The MIPS R4000 is >suppose to execute 50mips at 25Mhz. That's performance!! And what is ^^^^^^^^^^^^^^^ So that's one instructions per half cycle. How can this be? Is the MIPS R4000 some sort of multiprocessor? How does it handle conditional branching? -Avery
melling@cs.psu.edu (Michael D Mellinger) (03/24/90)
In article <35@isl.stanford.edu> awang@isl.Stanford.EDU (Avery Wang) writes: In article <Eqe#zm3@cs.psu.edu> melling@cs.psu.edu (Michael D Mellinger) writes: >answer(they're betting their futures on it). The MIPS R4000 is >suppose to execute 50mips at 25Mhz. That's performance!! And what is ^^^^^^^^^^^^^^^ So that's one instructions per half cycle. How can this be? Is the MIPS R4000 some sort of multiprocessor? How does it handle conditional branching? -Avery No that's 2 instructions per cycle! By putting more functional units (integer, FPU...) on a microprocessor and running them in parallel more work can be done. The Intel 860 and the ROMP II in the new IBM/6000 employ these techniques. Branching can be handled by putting an instruction after the branch that will be execute irregardless of whether the branch is taken or not. That way the micro. always has something to do. This is not the only way branches are handled. I think the 68040(RISCish) assumes that the branch will be taken and executes the next instruction hoping the branch will be taken and throws away the result if it isn't. The architecture people are playing all kinds of games. Steve, and company, got to throw away the Mac(old technology) and start over again to come up with something pretty great. You can do this if you don't have to worry about compatibility. The 68040 must also be compatible so it had to be evolutionary. You just can't throw out instructions to gain performance and to save silicon if your chip already has an installed base of millions. Wouldn't it be better if NeXT used a microprocessor that has its origins in the mid 80's instead of the late 70's (??). If a faster micro. is used then less optimization(read assembly programming) of programs is needed and software developers can spend more time adding functionality to their wares. Also, this means that NeXT can change micro. every couple of years without having to worry about losing its software base; it can ported in days instead of months. Software, software and software are the three biggest problems for any new platform. OS/2, NeXT, Unix(that old new standard(s)) are in a race. Whoever wins this software race wins the big bucks and survives the next five years. How about it? Should NeXT go with the micro. that will run at 50 mips at 25Mhz(extrapolating: 100mips at 50Mhz.) or the 68040 running at 50Mhz(~50 mips?)? -Mike
rca@cs.brown.edu (Ronald C.F. Antony) (03/25/90)
I don't think all this RISC hype is worth to go through. RISC is not bad, as it opened the eyes of the architecture people for some important points. The advantage of RISC architectures is declining, they had a big advantage when it was not possible to implement a CIS in hardware but had to use microcode for it. Today this is no longer a big problem and an avg. instruction takes only 1.3 cycles on a 68040. However the 68040 has support for thightly coupled multiprocessing which I could not find in the description of the IBM-RISC System/6000 Technology book IBM handed out at the latest demonstration here at Brown. Then also a CI is likely to have more power than an avg. RI. so MIPS alone tell a bad story. I rather have 4 68040's than only one fast RISC in my system (just think of MACH)... NeXT's prices still are very competitive, just look at what a Mac costs or what you get with your IBM systems i.e.nothing. Need Mathematica? well, pay around 2500$! Need a db-server? 2000$ at least in 1 user configuration etc.... Of course this does not mean that NeXT should stand still, and you can be sure they are not... What we need is a 68040 (i.e. 20MIPS @ 25MHz if you have to know) a 9600x a 512MB/20ms optical (of course it has to handle the 256MB disks too..) a nice color card with hardware speed ups 16 MB RAM if you like scsi-2, with a cache option if possible no floppies (256MB are for a NeXT like 256KB for a PC), with floppies as standard media you cripple the development of this machine I'm also quite confident that this is waht we can expect from NeXT. e.g. ever seen the pointers to the 96000 series in the documentation? guess why they are there... ever heared all the comments about the 68040? ever heared about pixar? well then you know what is coming. Even Canon is supposed to have the new drives ready. Ronald ------------------------------------------------------------------------------ "The reasonable man adapts himself to the world; the unreasonable one persists in trying to adapt the world to himself. Therefore all progress depends on the unreasonable man." Bernhard Shaw | rca@cs.brown.edu or antony@browncog.bitnet
n245bq@tamunix (Keith Perkins) (03/25/90)
Adding a chip to do Postscript crunching for the Printer wouldn't be a bad idea, IMHO. The performance slowdown when printing is a real pain! Keith Perkins Texas A&M University Internet: n245bq@tamunix.tamu.edu Bitnet : kdp9565@tamvenus
chari@ut-emx.UUCP (chari) (03/25/90)
In article <1378@shelby.Stanford.EDU> lane@sumex-aim.stanford.edu (Christopher Lane) writes: >To provide for users of the new cube, users of NeXTStep on AIX and to users of >the original cube, NeXT should take advantage of the elegance of the MACH >object file format and store the executable code for both the 68030 and the >RISC chip in separate TEXT segments, sharing common DATA, NIB, etc. segments >and allow the same binary to execute on all three platforms. You might have overlooked that fact that IBM uses the not so elegant AIX not Mach so, the object files format is different. So, your segment idea kind of loses there. Having the same binaries on the two machines is pointless anyway. What standard medium exists by which one could move files between the two machines? IBM does not have an optical with every machine and NeXT software does not come on tape. Chris
fischer@iesd.auc.dk (Lars P. Fischer) (03/25/90)
In article <FISCHER.90Mar24051147@blue.iesd.auc.dk> fischer@iesd.auc.dk (Lars P. Fischer) writes: >SPARC binaries are in general 25% larger than 68k (Sun-3) binaries. >With RAM prices down to $200/4M, who cares? Oops! That should have been $600/4M. Sorry. /Lars -- Lars Fischer, fischer@iesd.auc.dk | The difference between genius and CS Dept., Univ. of Aalborg, DENMARK. | idiocy is that genius has its limits.
mdeale@mira.acs.calpoly.edu (Myron Deale) (03/26/90)
In article <Emg0qn3@cs.psu.edu> melling@cs.psu.edu (Michael D Mellinger) writes: > [R4000 stuff deleted ...] > >Steve, and company, got to throw away the Mac(old technology) and >start over again to come up with something pretty great. You can do >this if you don't have to worry about compatibility. The 68040 must >also be compatible so it had to be evolutionary. I won't argue one way or tother about using RISC or CISC micro's. I don't particularly want to tether myself to the technology. Who knows, in another couple years the argument might include barrel processors!? [just thinking of executing threads efficiently ... ] > Also, this means that NeXT can change micro. every couple of >years without having to worry about losing its software base; it can >ported in days instead of months. Software, software and software are >the three biggest problems for any new platform. OS/2, NeXT, >Unix(that old new standard(s)) are in a race. Whoever wins this >software race wins the big bucks and survives the next five years. >-Mike Yes, software is important. Thus I'm swayed to think NeXT should stick it out with the 68000 series, i.e. upgrade to the 68040, etc. That "RISC stuff" goes like the blazes, very desirable for my computing style, but what DTP type person needs a 50 Mips word processor? My two cents then; how about going with those IPI drives, and using one of those laser-printer-accelerator chips that handles PostScript directly, like from Cirrus Logic. Frees the CPU from a lot of screen update crud. And some of the lp chips can pump out 45 pages a minute. The fly in the ointment is, you're left with a color problem. -Myron [You can throw in a 96000 DSP or i860 too :] // "Heavy iron, with a CPU pasted on." -- J. Mashey. // disclaimer: I barely speak for me, let alone a corporation.
philip@Kermit.Stanford.EDU (Philip Machanick) (03/26/90)
In article <260d50a2.19ff@petunia.CalPoly.EDU>, mdeale@mira.acs.calpoly.edu (Myron Deale) writes: > Yes, software is important. Thus I'm swayed to think NeXT should > stick it out with the 68000 series, i.e. upgrade to the 68040, etc. > That "RISC stuff" goes like the blazes, very desirable for my computing > style, but what DTP type person needs a 50 Mips word processor? > Well, how about a WYSIWYG program with all the capabilities of TeX, including a command view, in which you could edit TeX, with instantaneous updating of the WYSIWYG view? Sort of integrating TeX preview with Framemaker, without giving up the programmability of TeX. Would 50 mips be enough? Philip Machanick philip@pescadero.stanford.edu
melling@cs.psu.edu (Michael D Mellinger) (03/26/90)
In article <260d50a2.19ff@petunia.CalPoly.EDU> mdeale@mira.acs.calpoly.edu (Myron Deale) writes:
Yes, software is important. Thus I'm swayed to think NeXT should
stick it out with the 68000 series, i.e. upgrade to the 68040, etc.
That "RISC stuff" goes like the blazes, very desirable for my computing
style, but what DTP type person needs a 50 Mips word processor?
-Myron
[You can throw in a 96000 DSP or i860 too :]
// "Heavy iron, with a CPU pasted on." -- J. Mashey.
// disclaimer: I barely speak for me, let alone a corporation.
With a little bit a of an imagination, I'm sure you could find
something that 50(pick a number, any number) mips would not be enough.
DTP was the rage of the 80's. Computers are going to to be used for
multimedia in the 90's(Next, the computer of the 90's). Animation and
simulations require a lot of horsepower. But just thinking about the
immediate future (1 year), like most good American companies, my main
reason for putting a faster chip in the machine was so software
developers could spend more time writing software rather than
optimizing and debugging it. Software designers can then spend more
time adding greater functionality to their products instead.
If that doesn't convince you then how about this reason: Because
everyone is going to have a >30mip machine! If IBM can do it then
Sun, HP, Apollo, MIPS,...etc can do it also. NeXT is back at the
bottom in the performance game. Not I think NeXT should strive to be
no. 1 in mips, but I do think they should be competitive in mips/$.
After all, people aren't buying Nexts because they're speed demons.
No matter how much horsepower NeXT puts in their machine, some crazed
software developer is going to come out with something that pushes the
machine to its limits!!
Your last comment about about DTP type people raises another point.
Does one computer fit all? NeXT markets only one machine(ok, one w/o
floptical) at the high end of the market. Wouldn't they sell more
computers if they fit the market better? How much bigger is the under
$5000 market than the $5000-$10,000 market? And the under $2000
market? John Sculley you marketing genius, where are you?
-Mikelane@sumex-aim.stanford.edu (Christopher Lane) (03/27/90)
Wow, 14 replies in under 72 hours! I didn't intend to start that many
flames--now for just a little more kerosene:
\begin{opinion defense}
Most replies seemed to concentrate on the 'RISC' part of my original posting
which I think is only one of several issues. The three things I see over and
over (from current and potential NeXT owners) in this news group are:
1) There are not enough third-party products for the NeXT.
2) Is the company stable--will it be around after I buy the machine?
3) The machine's too slow.
The use of the new IBM chip would solve all three problems, not just the
third. What would attract more third-party developers are more potential
customers. I guess that even if the new IBM machines do 'poorly' they will
easily equal or outsell all the NeXTs to date. Doubling or tripling the
number of NeXTStep users will do more to make third party products available
and improve the outlook of NeXT's survival than just improving the speed of
the machine.
As far as machine speed goes, 20 MIPS seems to be a reasonable minimum and
what we can probably expect from a 68040-based NeXT. But remember, when the
NeXT was first introduced it seemed like it had more than enough power until
it became clear the more powerful softare (like Display PostScript) would
easily consume the cycles. Hopefully, even more powerful sofware will easily
consume the cycles on the next NeXT!
I'm more concerned with what comes after--can we again expect the follow on to
the 68040 to show up a year and a half to two years after the first in depth
article on it shows up? Will that be soon enough or will we all be waiting
intensely again? I believe the newer architectures will do better at
providing significant performance improvements on a regular basis--I don't
believe the propaganda that RISC is inherently better than CISC; the latter
has benefited from new ideas first tried out using the former but there are no
formal proofs yet with respect to instruction sets.
As unpopular and as unlikely as it is, I think that NeXT making use of the new
IBM RISC CPU along with NeXTStep under AIX will solve all three major
problems. In addition, an important one as far as the systems we develop is
concerned, it will provide a range of NeXTStep platforms from which to choose
(trading off price vs. performance) when delivering a completed (in our case
expert, medical) system.
In general, I agree with the various comments that the next NeXT utilizing the
more powerful Motorola's DSP chip and having more, denser memory. Some
specific replies:
In <1990Mar23.225518.21224@aqdata.uucp>, sullivan@aqdata.uucp writes:
>Jobs may license NextStep to IBM but I doubt he's going to let NeXT depend
>on IBM for the CPU.
Being able to easily move between CPUS and getting NeXT users to multiple CPUs
early (not using the Sun model but rather a multiply targeted binary) will
free NeXT from being held hostage by one CPU maker (IBM) or another
(Motorola).
In <FISCHER.90Mar24013936@blue.iesd.auc.dk>, fischer@iesd.auc.dk writes:
>Not that it's really an issue. o you really believe that IBM will let
>you get their chip? Did you ever see IBM selling RAM chips?
My recollection is that when the new IBM line came out there was an article,
quoting an IBM person, about IBM's interest in having other vendors build
machines around their new chip, mentioning NeXT by name as an example of a
company that will eventually need a RISC chip. If I (re)locate the article, I
will send you a citation for it.
In <424@toaster.SFSU.EDU>, eps@toaster.sfsu.edu writes:
>RISC architecture may be faster on simple benchmarks, but let's get
>realistic: it's a *memory hog*. Your performance is going to suck
>without a lot more RAM than you're probably willing to pay for,
>faster backing store than you can afford, plus you're going to
>need more disk space for all your executables, even with everything
>linked against shared libraries.
If one assumes that SPARC is typical of a RISC architecture, then do 'ls -l'
on /bin on a (680X0) Sun3 vs. a (SPARC) Sun4--the difference is < 10%. Can
the memory difference be much more? Look at /bin on the NeXT, 'who' takes up
more (disk) space than 'who' on the Sun3 and Sun4 combined! Other system
choices can have more effect on disk space consumption than just the
instruction set. Of course, one could also strip the segments for other
architectures if one really wanted to save the space.
In <26849@ut-emx.UUCP>, chari@ut-emx.uucp writes:
>You might have overlooked that fact that IBM uses the not so elegant
>AIX not Mach so, the object files format is different. So, your
>segment idea kind of loses there.
The multiple segment binary was mainly to address multiple architecture NeXTs.
However, my understanding is that OSF's Unix will derive most of its code from
AIX but will be built on Mach--can AIX on Mach or OSF on RS/6000 be far
behind? In the worst a case, one just has to have the reverse of 'atom' to
clean up the binaries.
>Having the same binaries on the two machines is pointless anyway. What
>standard medium exists by which one could move files between the two
machines?
Ethernet?
\end{opinion defense}
- Christopher
-------kgnome@hercule.cs.concordia.ca (MATIS stephane) (03/27/90)
The argumnet that RISC chips should be used with conjunction of AIX for the next NeXT is very strange. Why would anybody than buy an IBM made machine. At least in theory, very little would differentiate the two companies products [ if IBM & NeXT both produced on same platform ] This would trully be a farce in the educational areas ... Where IBM, with mighty deep pockets could finance more "User Friendly" computers to the schools ... and then NeXT would be stuck out in the cold from "the main" source of their revenue. I know this is over simplified, but such an occurence is so silly, that it may happen. To go against such threat, and to quelch the demand of people for speed & performance .. Please, [ NeXT officials listen-up ] , make the motherboard capable of accepting multiple 68040s directly ... I wouldn't mind 2 of them , one as original with the machine, the other as an option for "Power Users"... 68040 paralellism should go well for speed & power ... and Mach would simply run better [ understatement ] .. And if the community is still not enthusiastic, then NeXT should simply co-design with 3rd Party the first of many coprocessor boards , based on anything the market [ high-end ] trully wishes .. Of course ... this is from an UnderGrad ... /....\ /....\ /....\ /....\ ----------------------------- " Omnipotence exist in omnipotent minds " - D. Dayze Stephane M. aka K. Gnome " Color war ... the constant fight for more bits! " - K. Gnome
UH2@psuvm.psu.edu (Lee Sailer) (03/27/90)
There would be large costs in changing or adding a new CPU to the NeXT equation at this time. Don't forget that an organization's technical expertise is an important asset, and much of NeXT's current expertise is with the 680x0, not some new chip. New chips mean new compilers, new debuggers, new bugs, and a whole new set of neural pathways. I say, go with what you already know til proven wrong. (And then, go chapter 11 8-).
schock@cpsc.ucalgary.ca (Craig Schock) (03/27/90)
In article <1385@shelby.Stanford.EDU>, lane@sumex-aim.stanford.edu (Christopher Lane) writes: > > [stuff deleted] > > which I think is only one of several issues. The three things I see over and > over (from current and potential NeXT owners) in this news group are: > > 1) There are not enough third-party products for the NeXT. > > 2) Is the company stable--will it be around after I buy the machine? > > 3) The machine's too slow. > > The use of the new IBM chip would solve all three problems, not just the > third. I don't see how using a specific RISC chip (in this case the new IBM RISC) will solve all of the above problems. How will this ensure that the company (NeXT) will stay around after you buy the machine? Although using an IBM chip could possibly increase the amount of third party software for the NeXT (although not too likely), it's more than possible that this software, not being developed on a NeXT, may not exploit the "extras" that the NeXT has. ======================================================================== Craig Schock schock@cpsc.UCalgary.CA University of Calgary (More reliable ->) schock@flip.cpsc.UCalgary.CA DAMMIT, Jim, I'm a doctor not an OCEOTRIPTAPHANTIAENTOLOGIST! ========================================================================
brown@cyberpunk.INS.CWRU.Edu (Dan Brown) (03/27/90)
In article <2027@clyde.concordia.ca> kgnome@hercule.CS.Concordia.CA (MATIS stephane) writes: > > > The argumnet that RISC chips should be used with conjunction of AIX for the next NeXT is > very strange. > >Why would anybody than buy an IBM made machine. Why indeed??? If I want and Ibm, I'll buy an Ibm. I would much rather see NeXT use whatever creativity Mr Jobs has assembled ( Which would be considerable if precedence holds) and create a new, better machine. From what I have seen of the NeXT cube, I like it. It is at presant, slow and clunky (esp the floptical drive... clunk clunk clunk) and it has a lot of bugs, but, It has LOTS of potential. I would like to see what they can do with the 68040 chip. I am impressed with what I have seen so far. If the bugs and so on can be cleaned up, and the overall speed improved, NeXT will have a winner. I would imagine that all of this will come with time. > > > Of course ... this is from an UnderGrad ... Ya so... So is this. Dan Brown brown@cwjcc.cwru.edu brown@pirate.ins.cwru.edu
edwardm@hpcuhc.HP.COM (Edward McClanahan) (03/27/90)
lane> lane@sumex-aim.stanford.edu (Christopher Lane) clari> chari@ut-emx.UUCP (chari) lane> To provide for users of the new cube, users of NeXTStep on AIX and to lane> users of the original cube, NeXT should take advantage of the elegance lane> of the MACH object file format and store the executable code for both lane> the 68030 and the RISC chip in separate TEXT segments, sharing common lane> DATA, NIB, etc. segments and allow the same binary to execute on all lane> three platforms. clari> You might have overlooked that fact that IBM uses the not so elegant clari> AIX not Mach so, the object files format is different. So, your segment clari> idea kind of loses there. Having the same binaries on the two machines clari> is pointless anyway. What standard medium exists by which one could clari> move files between the two machines? IBM does not have an optical with clari> every machine and NeXT software does not come on tape. But the first poster's (lane's) would allow a single program file to work on both a 68030-based NeXT and a Risc-based NeXT...
rca@cs.brown.edu (Ronald C.F. Antony) (03/27/90)
I disagree that IBM's RISC chip will solve the 3 problems you mentioned. 1) NeXTStep is not dependend on the Hardware used, so a re- or crosscompilation is enough to have an App running on both systems, regardless of what CPU you use. The IBM chip has no effect on that. 2) NeXT is not becoming more stable just by having an IBM CPU. The only point this could have, is that people can use the programs on both machines iff IBM would adapt to MACH. But then why not just buy an IBM machine... The Chip in this case does nothing for NeXT but a lot to IBM. 3) Speed can also be solved by 68040 But now the bad news: an IBM rep. I talked to indirectly admited that IBM will not put as much effort into NeXTStep as in X. They might change their view if users demand it more and if more Apps are there. Now IBM is making big efforts to get Software ported, but to X not NeXTStep ... This means, IBM will push NeXTStep if the Applications are there, so it basically is up to NeXT to CREATE this base. How half-hearted IBM is in regard to NeXTStep can be seen in the statement, that they see it more as a platform for application development than for end users. i.e. develop your prototypes on NeXTStep, sell them ported under X... As far as I know they do not even have the PC-emulator running under NeXTStep, this shows also a lot... In short: IBM will take the profit NeXT prepares, NeXT can tell to scared business people that even IBM sells NeXTStep. So the the business people are happy, IBM does nothing, NeXT will have to work. Ronald ------------------------------------------------------------------------------ "The reasonable man adapts himself to the world; the unreasonable one persists in trying to adapt the world to himself. Therefore all progress depends on the unreasonable man." Bernhard Shaw | rca@cs.brown.edu or antony@browncog.bitnet
root@nebulus.UUCP (Dennis S. Breckenridge) (03/28/90)
What I would like to see more than anything "new and improved" is
a proper serial port card. Short of connecting the NeXT to an
Annex box how do you get this toy on the air with modems. The
existing serial ports are half RS232, no hardware flow control
to speak of. This is not the accepted way of talking to a Telebit.
--
-----------------------------------------------------------------------------
Dennis S. Breckenridge (604) 277-7413 dennis@nebulus.uucp VE7TCP
EMACS: Eight Megabytes And Constantly Swapping!
-----------------------------------------------------------------------------