slfields@uokmax.ecn.uoknor.edu (Scott L Fields) (04/19/91)
This has always seemed a bit of a problem to me. The more dense they make the circuitry, the poorer in general the yield per wafer tends to be. In any case, it makes sense to me in general to make all of the major components of the cpu and split them up (integer, floating point, vector, control, MMU, cache, etc) into seperate dies on the wafers. After which, those parts are tested individually and split and stored. Is there a cost or performance problem to just mounting all those chips on a ceramic plate with any prerequisite wiring and gold wire bond the chip leads. This is also along the lines of what most risc chip sets are like anyway but they are connected on the outside of the package. I have not had any fabrication classes for semiconductors. I am just curious to see why no one does this except in very specialized cases. You end up with a large device with a huge number of connections, but most of the devices have this plague to begin with. What is the problem? If you are not sure what I am talking about, please let me know what needs to be clarified. -- -------------------------------------------------------------------------------- Scott Fields slfields@uokmax.ecn.uoknor.edu University of Oklahoma --------------------------------------------------------------------------------