gillham@edmund.cs.andrews.edu (Andrew Gillham) (06/12/91)
I just got the latest INFOWORLD and it had an article on a NeXT prototype machine based on the Motorola 88110 RISC chip. Claims it will do 40-50 MIPS or so and will cost about the same as the current 68040 machine. If NeXT is going to really introduce it, it would ship in late '91 or early '92. I can type in the article if anyone is interested. (it's at work right now) I wonder if anyone out there has heard anything about this? Supposedly it simply requires a recompile of a current NeXT app to get it to run on the 88110. 40-50 MIPS for only $3500 (educational) would be incredible! (even for $5000 it would be awesome!) Thoughts? (or am I bringing up old news?) -Andrew -- =========================================================================== Andrew Gillham Andrews University (gillham@andrews.edu)
smithw@hamblin.math.byu.edu (Dr. William V. Smith) (06/12/91)
Well, I might add that Moto has made it *very* attractive to NeXT to go with the 88110. They want NeXT to buy into the 88k line bad, especially since HP decided on the PA route. However, something may be fishy with the infoworld article. The Mips number is a bit low I think. Unless NeXT put on the brakes to keep costs down somewhere. There was some question about putting in on board color support instead of (as a lower cost option) the ND board for cubes. Haven't heard anything about that yet. My NeXT person would not tell me anything about that. It would be interesting to know what the internal email message said regarding the infoworld article. -Bill -- EMail: smithw@hamblin.math.byu.edu or uunet!hamblin.math.byu.edu!smithw SMail: Math Dept. -- 314 TMCB; BYU; Provo, UT 84602 (USA) NeXTmail: bill@mathnx.math.byu.edu Phone: +1 801 378 2061 FAX: +1 801 378 2800
mcgredo@prism.cs.orst.edu (Don McGregor) (06/12/91)
gillham@edmund.cs.andrews.edu (Andrew Gillham) writes: > > >I just got the latest INFOWORLD and it had an article on a NeXT prototype >machine based on the Motorola 88110 RISC chip. When does Moto expect to start shipping the chips? Don McGregor | "I..I blame society. Society made me mcgredo@prism.cs.orst.edu| what I am."
torrie@cs.stanford.edu (Evan Torrie) (06/13/91)
smithw@hamblin.math.byu.edu (Dr. William V. Smith) writes: > However, something may be fishy with the infoworld article. >The Mips number is a bit low I think. Unless NeXT put on the >brakes to keep costs down somewhere. There was some question about >putting in on board color support instead of (as a lower cost >option) the ND board for cubes. Yes, I heard the same rumour [about six months ago], that they would effectively incorporate NeXT Dimension's capabilities onto the motherboard of their 88110 machines [by trashing Intel's 860 and going with the 96002]. -- ------------------------------------------------------------------------------ Evan Torrie. Stanford University, Class of 199? torrie@cs.stanford.edu "If it weren't for your gumboots, where would you be? You'd be in the hospital, or in-firm-ary..." F. Dagg
mfriedel@slate.mines.colorado.edu (Friedel Michael) (06/13/91)
In article <SMITHW.91Jun12071931@hamblin.hamblin.math.byu.edu> smithw@hamblin.math.byu.edu (Dr. William V. Smith) writes: >Well, I might add that Moto has made it *very* attractive to NeXT >to go with the 88110. They want NeXT to buy into the 88k line >bad, especially since HP decided on the PA route. > However, something may be fishy with the infoworld article. >The Mips number is a bit low I think. Unless NeXT put on the ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ I heard from someone at NeXT that the machine is going to be in the order of 100 MIPS, and that it is going to be a multiprocessor environement. They where talking about beating the SNAKE. Mike -- /\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\ No user serviceable part inside. Warranty void if opened modified or tampered with. No batteries included. *
thomsen@spf.trw.com (Mark R. Thomsen) (06/13/91)
Andrew Gillham writes I just got the latest INFOWORLD and it had an article on a NeXT prototype machine based on the Motorola 88110 RISC chip. Claims it will do 40-50 MIPS or so and will cost about the same as the current 68040 machine. If NeXT is going to really introduce it, it would ship in late '91 or early '92. I would anticipate that NeXT has something going with the 88000 line in an experimental stage, as they should with any potential future processor paths. One of the advantages of that factory investment is how fast they can turn a prototype design into a prototype board. Note that NeXT ported Mach to the i860 and has some expertise hired from CMU (Avadis Tevanian). I would speculate that a multiprocessor board that fits in another NeXTbus slot would be a possibility, using Mach as the OS layer. I think the i860 Mach is not in the CMU release and is unique (proprietary?) to NeXT. The InfoWorld speculation on the NeXTdimension makes no sense - the i860 is not just a data processor but a data mover ... it's bandwidth is a major reason to use it in a graphics board. The data bandwidth of the i860 peaks at 16 bytes x clock rate. The data bandwidth of the 88K peaks at 4 bytes x clock rate. An 88K CPU board might be interesting but doubtful in the near term - the 88K is so different from the 68K that it would cause severe breakage. (The 88K design team was distinct, different from the 68K team). Howsoever, it may be inevitable in the long term since a) NeXT needs a RISC growth path, b) NeXT can get a good deal given how few 88Ks there are relative to MIPS and SPARCs, and c) it is a righteous processor. The 96002 upgrade from the 56001 is so natural that I have been assuming this would happen. It is natural. Just a matter of when. My 2 cents Mark R. Thomsen
ssr@stokes.Princeton.EDU (Steve S. Roy) (06/13/91)
In article <2856A9FB.41AD@deneva.sdd.trw.com> thomsen@spf.trw.com (Mark R. Thomsen) writes: >Andrew Gillham writes > >The InfoWorld speculation on the NeXTdimension makes no sense - the >i860 is not just a data processor but a data mover ... it's bandwidth >is a major reason to use it in a graphics board. The data bandwidth of >the i860 peaks at 16 bytes x clock rate. The data bandwidth of the 88K >peaks at 4 bytes x clock rate. > > >Mark R. Thomsen This is not really true of the i860. It can talk to it's tiny little 8kb on-chip cache at 16 bytes per clock, but the current i860's can talk to the outside world at only 4bytes per. Supposedly the next generation of them will double that rate, but it still isn't great. More generally, current high density ram chips will have difficulty keeping up with anything that tries to run at the sorts of speeds tossed around by the new RISC speed demons. Anything that claims better than 20MIP performance or so is going to be heavily cache dependant. Steve Roy