bammi@DSRGSUN.CES.CWRU.EDU (Jwahar R. Bammi) (03/18/89)
I am sorry, but in my previous report about gcc V1.34 and m68k, i may
have given an incomplete explaination ( i just showed it to a friend
and he suggested this followon to explain a little better)
The instruction in question was
>> cmpb #46,LC0+2 <- bug here for m68000, LC0+2 is not a data alterable
after it goes though gcc-as it gets turned into
cmpib #46,pc@(<offset>)
and for the m68000, cmpi instruction only data alterable addressing
modes are allowed, and pc@(<offset>) is not.
I hope that clears it up. Sorry about the incomplete info the first
time around.
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bruce@heather.pooh.com (Bruce Robertson) (03/18/89)
> The instruction in question was >> cmpb #46,LC0+2 <- bug here for m68000, LC0+2 is not a data alterable An intelligent assembler should recognize this case, and generate the absolute long addressing mode instead of PC relative.