adam@UUNET.UU.NET (Adam de Boor) (10/26/89)
Here's a fun one for you. Situation is as usual: SparcStation running
SunOS4.0.3. The following test file causes a bogus address to be passed to
bzero because for some reason gcc is getting the address by adding 92
to the sp. This is reflected in the initial rtl generated by -dr, as
indicated below. Following is C code, initial rtl and assembly code, all
generated by running "cc1 -O -g -dr q.c". This happens only on the sparc.
I ran it through the sun3 version and the code is correct, perhaps because
there's no stack alignment getting in the way?
a
===============
q.c
===============
typedef struct {
long name;
int alignment;
long nextOff;
} SegDesc;
biff(SegDesc *sd, unsigned short n)
{
if (n & sd->alignment) {
int extra = (sd->alignment+1) - (n & sd->alignment);
char zeroes[extra];
bzero(zeroes, extra);
Out_Block(sd->nextOff - extra, zeroes, extra);
}
}
===============
Initial RTL
===============
;; Function biff
(note 1 0 2 ("q.c") 8)
(note 2 1 3 "" NOTE_INSN_DELETED)
(note 3 2 4 "" NOTE_INSN_FUNCTION_BEG)
(insn 4 3 5 (set (reg/v:SI 64)
(reg:SI 24)) -1 (nil)
(nil))
(insn 5 4 6 (set (reg/v:HI 65)
(subreg:HI (reg:SI 25) 0)) -1 (nil)
(nil))
(note 6 5 7 "" NOTE_INSN_DELETED)
(note 7 6 8 "" NOTE_INSN_DELETED)
(note 8 7 9 ("q.c") 9)
(insn 9 8 10 (set (reg:SI 66)
(zero_extend:SI (reg/v:HI 65))) -1 (nil)
(nil))
(insn 10 9 11 (set (reg:SI 68)
(mem/s:SI (plus:SI (reg/v:SI 64)
(const_int 4)))) -1 (nil)
(nil))
(insn 11 10 12 (set (reg:SI 67)
(and:SI (reg:SI 66)
(reg:SI 68))) -1 (nil)
(nil))
(insn 12 11 13 (set (cc0)
(reg:SI 67)) -1 (nil)
(nil))
(jump_insn 13 12 14 (set (pc)
(if_then_else (ne (cc0)
(const_int 0))
(pc)
(label_ref 51))) -1 (nil)
(nil))
(note 14 13 15 "" NOTE_INSN_BLOCK_BEG)
(note 15 14 16 ("q.c") 10)
(insn 16 15 17 (set (reg:SI 70)
(zero_extend:SI (reg/v:HI 65))) -1 (nil)
(nil))
(insn 17 16 18 (set (reg:SI 72)
(mem/s:SI (plus:SI (reg/v:SI 64)
(const_int 4)))) -1 (nil)
(nil))
(insn 18 17 19 (set (reg:SI 71)
(and:SI (reg:SI 70)
(reg:SI 72))) -1 (nil)
(nil))
(insn 19 18 20 (set (reg:SI 73)
(plus:SI (reg:SI 71)
(const_int -1))) -1 (nil)
(nil))
(insn 20 19 21 (set (reg:SI 74)
(mem/s:SI (plus:SI (reg/v:SI 64)
(const_int 4)))) -1 (nil)
(nil))
(insn 21 20 22 (set (reg/v:SI 69)
(minus:SI (reg:SI 74)
(reg:SI 73))) -1 (nil)
(nil))
(insn 22 21 23 (set (reg:SI 75)
(reg/v:SI 69)) -1 (nil)
(nil))
(insn 23 22 24 (set (reg:SI 76)
(reg:SI 14)) -1 (nil)
(nil))
(insn 24 23 25 (set (reg:SI 77)
(reg:SI 75)) -1 (nil)
(nil))
(insn 25 24 26 (set (reg:SI 78)
(plus:SI (reg:SI 77)
(const_int 7))) -1 (nil)
(nil))
(insn 26 25 27 (set (reg:SI 77)
(lshiftrt:SI (reg:SI 78)
(const_int 3))) -1 (nil)
(nil))
(insn 27 26 28 (set (reg:SI 79)
(ashift:SI (reg:SI 77)
(const_int 3))) -1 (nil)
(nil))
(insn 28 27 29 (set (reg:SI 14)
(minus:SI (reg:SI 14)
(reg:SI 79))) -1 (nil)
(nil))
(insn 29 28 30 (set (reg:SI 80)
(reg:SI 14)) -1 (nil)
(nil))
;; ------------- WHY? ------------
(insn 30 29 31 (set (reg:SI 80)
(plus:SI (reg:SI 80)
(const_int 92))) -1 (nil)
(nil))
(note 31 30 32 ("q.c") 13)
(insn 32 31 33 (set (reg:SI 8)
(reg:SI 80)) -1 (nil)
(nil))
(insn 33 32 34 (set (reg:SI 9)
(reg/v:SI 69)) -1 (nil)
(nil))
(insn 34 33 35 (use (reg:SI 8)) -1 (nil)
(nil))
(insn 35 34 37 (use (reg:SI 9)) -1 (nil)
(nil))
(call_insn 37 35 38 (parallel[
(set (reg:SI 8)
(call (mem:SI (symbol_ref:SI ("bzero")))
(const_int 0)))
(use (reg:SI 31))
] ) -1 (nil)
(nil))
(note 38 37 39 ("q.c") 14)
(insn 39 38 40 (set (reg:SI 82)
(mem/s:SI (plus:SI (reg/v:SI 64)
(const_int 8)))) -1 (nil)
(nil))
(insn 40 39 41 (set (reg:SI 81)
(minus:SI (reg:SI 82)
(reg/v:SI 69))) -1 (nil)
(nil))
(insn 41 40 42 (set (reg:SI 8)
(reg:SI 81)) -1 (nil)
(nil))
(insn 42 41 43 (set (reg:SI 9)
(reg:SI 80)) -1 (nil)
(nil))
(insn 43 42 44 (set (reg:SI 10)
(reg/v:SI 69)) -1 (nil)
(nil))
(insn 44 43 45 (use (reg:SI 8)) -1 (nil)
(nil))
(insn 45 44 46 (use (reg:SI 9)) -1 (nil)
(nil))
(insn 46 45 48 (use (reg:SI 10)) -1 (nil)
(nil))
(call_insn 48 46 49 (parallel[
(set (reg:SI 8)
(call (mem:SI (symbol_ref:SI ("Out_Block")))
(const_int 0)))
(use (reg:SI 31))
] ) -1 (nil)
(nil))
(note 49 48 50 "" NOTE_INSN_BLOCK_END)
(insn 50 49 51 (set (reg:SI 14)
(reg:SI 76)) -1 (nil)
(nil))
(code_label 51 50 52 2)
(note 52 51 53 "" NOTE_INSN_FUNCTION_END)
(note 53 52 54 ("q.c") 16)
(code_label 54 53 0 1)
===============
Assembly code
===============
gcc_compiled.:
.stabs "q.c",100,0,0,Ltext
Ltext:
.stabs "int:t1=r1;-2147483648;2147483647;",128,0,0,0
.stabs "char:t2=r2;0;127;",128,0,0,0
.stabs "long int:t3=r1;-2147483648;2147483647;",128,0,0,0
.stabs "unsigned int:t4=r1;0;-1;",128,0,0,0
.stabs "long unsigned int:t5=r1;0;-1;",128,0,0,0
.stabs "short int:t6=r1;-32768;32767;",128,0,0,0
.stabs "long long int:t7=r1;0;-1;",128,0,0,0
.stabs "short unsigned int:t8=r1;0;65535;",128,0,0,0
.stabs "long long unsigned int:t9=r1;0;-1;",128,0,0,0
.stabs "signed char:t10=r1;-128;127;",128,0,0,0
.stabs "unsigned char:t11=r1;0;255;",128,0,0,0
.stabs "float:t12=r1;4;0;",128,0,0,0
.stabs "double:t13=r1;8;0;",128,0,0,0
.stabs "long double:t14=r1;8;0;",128,0,0,0
.stabs "void:t15=15",128,0,0,0
.stabs "SegDesc:t16=s12name:3,0,32;alignment:1,32,32;nextOff:3,64,32;;",128,0,0,0
.text
.align 4
.global _biff
.proc 1
_biff:
.stabn 68,0,8,LM1
LM1:
!#PROLOGUE# 0
save %sp,-112,%sp
!#PROLOGUE# 1
mov %i0,%l3
.stabn 68,0,9,LM2
LM2:
sll %i1,0x10,%i1
srl %i1,0x10,%i1
ld [%l3+4],%o1
andcc %i1,%o1,%o0
be L2
nop
LBB2:
.stabn 68,0,10,LM3
LM3:
add %o0,-1,%o0
sub %o1,%o0,%l1
mov %sp,%l0
add %l1,7,%o0
and %o0,-8,%o0
sub %sp,%o0,%sp
mov %sp,%l2
add %l2,92,%l2 ! <<<<<< Whoa!
.stabn 68,0,13,LM4
LM4:
mov %l2,%o0
call _bzero,0
mov %l1,%o1
.stabn 68,0,14,LM5
LM5:
ld [%l3+8],%o0
sub %o0,%l1,%o0
mov %l2,%o1
call _Out_Block,0
mov %l1,%o2
LBE2:
mov %l0,%sp
L2:
.stabn 68,0,16,LM6
LM6:
ret
restore
.stabs "biff:F1",36,0,0,_biff
.stabs "sd:P17=*16",64,0,0,19
.stabs "extra:r1",64,0,0,17
.stabs "zeroes:r18=*19=ar1;0;0;2",64,0,0,18
.stabn 192,0,0,LBB2
.stabn 224,0,0,LBE2