dan%jeremy.DEC@DECWRL.DEC.COM (Dan Frommer) (10/05/88)
Attached is the "Q" processor spec. I'm interested in hosting GCC under
VAX/VMS, while targeting the code to the 16-bit Q. Is this feasable?
Are there limitations on targeting GCC's output to a 16-bit machine?
How hard is it to adapt the machine description files to a new target?
Dan
"Q" Processor Description
-------------------------
The "Q" processor is a 16 bit micro-controller used as an on-chip
control processor, which also has a 16-bit address space.
It has 8 general purpose registers, a stack pointer, and several
other control registers (The SP & PC are not part of the GPRs). A
single addressing mode is available: Base Register + Offset. Small
(5-bit) constants can be used as literals in arithmetic instructions,
and a Load Immediate instruction can load a register with a single
word constant. Memory can only be referenced using word (16-bit)
addresses. Least significant bits have lower addresses.
The instruction set includes various integer arithmetic & logical
instructions. but no multiply/divide. No condition code is
available, and test reg+branch is done using single instructions. A
carry bit is available to enable multiple precision arithmetic.
The stack is used for push/pop register instructions, and
call/return.bunda@cs.utexas.edu (John Bunda) (10/05/88)
You can probably make gcc generate code for the "Q" processor provided you run it as a crosscompiler on the Vax as you indicate. A machine description is not hard, but there is a bit of a learning curve. You will also face the problem of not having a library, so you will essentially have to rewrite gnulib (library routines for certain "instructions" like multiply, mod, divide, etc.) as well as some of the standard unixoid utilities as well, e.g. malloc, printf, etc. I have done this for an experimental machine, and it works quite well. (you will also need an assembler and linker - we wrote our own assembler, and are using gnu ld from binutils). Good luck... -John -- ................................... John Bunda UT CS Dept. bunda@cs.utexas.edu Austin, Texas
dan%jeremy.DEC@DECWRL.DEC.COM (Dan Frommer) (10/06/88)
Attached is the "Q" processor spec. I'm interested in hosting GCC under
VAX/VMS, while targeting the code to the 16-bit Q. Is this feasable?
Are there limitations on targeting GCC's output to a 16-bit machine?
How hard is it to adapt the machine description files to a new target?
Dan
"Q" Processor Description
-------------------------
The "Q" processor is a 16 bit micro-controller used as an on-chip
control processor, which also has a 16-bit address space.
It has 8 general purpose registers, a stack pointer, and several
other control registers (The SP & PC are not part of the GPRs). A
single addressing mode is available: Base Register + Offset. Small
(5-bit) constants can be used as literals in arithmetic instructions,
and a Load Immediate instruction can load a register with a single
word constant. Memory can only be referenced using word (16-bit)
addresses. Least significant bits have lower addresses.
The instruction set includes various integer arithmetic & logical
instructions. but no multiply/divide. No condition code is
available, and test reg+branch is done using single instructions. A
carry bit is available to enable multiple precision arithmetic.
The stack is used for push/pop register instructions, and
call/return.
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