MBF@Cmu-20c@sri-unix (09/16/82)
Eric: Keep this handy list of the 6850 control register bits handy: ----------------------------------------------------- CR1 CR0 Counter Divide Select Bits 0 0 divide by 1 0 1 divide by 16 1 0 divide by 64 CR4 CR3 CR2 Word Select Bits 0 0 0 7 bits + even parity + 2 stop bits 0 0 1 7 bits + odd parity + 2 stop bits 0 1 0 7 bits + even parity + 1 stop bit 0 1 1 7 bits + odd parity + 1 stop bit 1 0 0 8 bits + no parity + 2 stop bits 1 0 1 8 bits + no parity + 1 stop bit 1 1 0 8 bits + even parity + 1 stop bit 1 1 1 8 bits + odd parity + 1 stop bit CR6 CR5 Transmitter Control Bits 0 0 *RTS = low, xmit interrupt disabled 0 1 *RTS = low, xmit interrupt enabled 1 0 *RTS = high, xmit interrupt disabled 1 1 *RTS = low, xmit interrupt disabled CR7 Receive Interrupt Enable Bit a 1 here enables RDRF (receive data reg full), positive edge on *dcd line (see a pinout), and overrun. 0 disables. -------------------------------------------------------- You are correct in sending a $03 (03H to you cp/m / 8080 / z80 hackers) to init the 6850. As for the $91, that means, obviously: 1001 0001 = 1 00 100 01 | | | | | | | divide rx/tx clock by 16 | | | (16 samples/bit) | | | | | 8 bits, no parity, 2 (!) stop bits | | (this must be for 110 baud - yucch!) | | | *rts low, no interrupt on tdre | (transmit data reg empty) | receive interrupts are enabled. With the chart, you ought to be able to find what you need. Note that you probably don't want to use the 1x divide unless you are also transmitting clock information (pseudo-synchronous). If it is async for a modem or printer, you have to use 16x or 64x clock to let the 6850 sample for the start bit. Good Luck! Mark Dzmura (via mbf@cmu-20c) -------