SPAM@Mit-Ai@sri-unix (11/19/82)
From: David A Boulton <SPAM@Mit-Ai> The 6502 does have something along the lines of a Halt and Catch Fire instruction. If one executes any illegal opcode that has the most significant bit set, the processor will immediately jump to hyperspace. As I remember, RESET will exit the wedged state, but everything else (IRQ, NMI, etc.) is ignored. Legend has it that this was caused by a last minute 'fix' to the chip mask just before the chip was going to production. A byproduct of the last minute fix was that some state transitions are undefined. As far as I know no one has ever bothered to fix the fix. Other interesting (and more subtle) problems with the 6502 include: - A Jump Indirect operation where the address is xxFF will use the bytes xxFF and xx00 instead xxFF and xxFF+1. I would have taken an extra cycle to propagate the carry, so they didn't bother. - The 6502 is claimed to prefetch instructions to improve it's speed, but careful work with a logic analyser shows that while a byte may be prefetched, it is \always/ thrown away and fetched again when it is actually going to be used. - The processor has a nasty habit of reading random memory locations while it is calculating an effective address in some modes. This weird behaviour is documented by the manufacturers, but it means that you may not use indirect/ indexed modes in dealing with I/O ports since you might strobe a port twice. At least it doesn't WRITE random bytes! Overall the 6502 is not significantly worse than any other 8 bit micro, but I sure wish the designers had finished it before they started to sell them. -- spam