[comp.parallel] ICPP'88 references, volume 1 for comp.parallel

eugene@ORVILLE.NAS.NASA.GOV (Eugene Miya) (09/16/88)

%h $Revision$ $Date$

%A S. Wayne Bollinger
%A Scott F. Midkiff
%Z VA Poly, Blacksburg, VA
%T Processor and Link Assignment in Multicomputers
using Simulated Annealing
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 1-7
%K distributed systems, mapping problem, process annealing,
connection annealing, hypercube traffic,

%A L. V. Kale
%Z U. Ill
%T Comparing the Performance of Two Dynamic Load Distribution Methods
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 8-12
%K distributed systems, contracting within a neighborhood (CWN),
Gradient Model (GM, Lin and Keller), simulation, Oracle,
double lattice mesh (DLM),

%A Ravi Varadarajan
%A Eva Ma
%T An Approximate Load Balancing Model with Resource Migration in
Distributed Systems
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 13-17
%K distributed systems, commodity distribution, heuristic,
file migration, host migration, cost,

%A Kazuaki Rokusawa
%A Nobuyuki Ichiyoshi
%A Takashi Chikayama
%Z ICOT
%A Hiroshi Nakashima
%Z MEC
%T An Efficient Termination Detection and Abortion Algorithm for Distributed
Processing Systems
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 18-22
%K distributed systems, weighted throw counting (WTC), FIFO communication,

%A Doddaballapur N. Jayasimha
%Z CSRD, U. Ill
%T Distributed Synchronizers
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 23-27
%K distributed systems, barrier, reporting, mutual exclusion,
synchronization tree, bounded fair, walk-in walk-out,
DSP operation, Distributed Synchronizer P, distributed semaphores,
DSV operation, Distributed Synchronizer V,

%A Jaime H. Moreno
%A Tomas Lang
%Z UCLA
%T Graph-based Partitioning of Matrix Algorithms for Systolic Arrays:
Application to transitive Closure
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 28-31
%K Systolic Arrays, G-graph, G-node,

%A P. S. Tseng
%Z CMU
%T Sparse Matrix Computations on Warp
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 32-38
%K Systolic Arrays,
implemented Incomplete Choleski Pre Conditioned Conjugate Gradient (ICPCCG),
SOR relaxation,

%A V. K. Prasanna Kumar
%A Yu-Chen Tsai
%Z USC
%T Mapping Two Dimensional Systolic Arrays to One Dimensional Arrays
and Applications
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 39-46
%K Systolic Arrays, matrix multiplication, transitive closure,
variable memory family (VMF) model, variable channel family (VCF) model,
wafer scale integration, WSI,

%A Bard Tokerud
%A Vidar S. Andersen
%A Morten Toverud
%Z Norwegian Defense Research Establishment
%T CESAR - The Architecture and Implementation of a High Performance
Systolic Array Processor
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 47-50
%K Systolic Arrays, SIMD, synthetic aperture radar (SAR),
microprogrammable arithmetic unit (MALU), mesh, S-elements,

%A A. Yu. Kondratyev
%A L. Ya. Rosenblum
%A A. V. Yakovlev
%Z Leningrad EE Inst., 197022 USSR
%T Signal Graphs: A Model for Designing Concurrent Logic
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 51-54
%K Logic Design and Tools, VLSI, self-timed, state transition,
coherent, coupledness

%A Kai Hwang
%A Ahmed Louri
%Z USC
%T Optical Arithmetic Using Symbolic Signed-Digit Substitution
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 55-64
%K Logic Design and Tools, addition, multiplication, division,
performance analysis, spatial light modulator (SLM),
liquid crystal light valve (LCLV),

%A Steven P. Smith
%A Bill Underwood
%A Joe Newman
%Z MCC
%T An Analysis of Parallel Logic Simulation on Several Architectures
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 65-68
%K Logic Design and Tools, interprocessor communication, ring,
arrays (mesh), bus, hypercube, crossbar, circuit partitioning,

%A Zebo Peng
%Z Linkoping U., Sweden
%T Semantics of a Parallel Computation Model and its Applications in
Digital Hardware Design
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 69-73
%K Logic Design and Tools, Petri net, CAMAD,
calculus for communicating systems (CCS),

%A Sumit Ghosh
%A Meng-Lin Yu
%T An Asynchronous Distributed Approach for the Simulation of
Behavior-Level Models on Parallel Processors
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 74-77
%K Logic Design and Tools, contention, blocking, deadlock,

%A Teemu Kerola
%A Alfred Hartmann
%T Operational Analysis on Hyper-Rectangulars
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 78-82
%K Meshes, communications, near neighbor, routing, traffic,
toroids, bi-directional toroids, queue length, response time,
%X Model without simulation.

%A Jianjian Song
%A Larry Kinney
%Z U. of Minn.
%T Distributed Termination on a Mesh
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 83-85
%K Meshes, symmetric, asynchronous, message passing, correctness,
state transition,

%A Abdol-Hossein Esfahanian
%A Lionel M. Ni
%A Bruce E. Sagan
%T On Enhancing Hypercube Multiprocessors
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 86-89
%K Meshes, twisted N-cube, complete binary tree,
distributed memory multiprocessor system, vertex connectivity,
n-regular graphs, $TQ sub n$

%A Seth Abraham
%A Krishnan Padmanabhan
%T Reliability of the Hypercube
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 90-94
%K Meshes, binary d-cube, node failure, link failure, combined failure,
remapping topologies, MTTF, state diagram, paper study,

%A Mi Lu
%T Solving Visibility Problems on MCC's of Smaller Size
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 95-102
%K Meshes, mesh connected computer (MCC), SIMD, vision,
parallel view, perspective view, collision avoidance,

%A Meera Balakrishnan
%A Rajiv Jain
%A C. S. Raghavendra
%Z USC
%T On Array Storage for Conflict-Free Memory Access for Parallel Processors
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 103-107
%K Multiprocessor Issues, magic square puzzle, storing N x N arrays,
assignment,

%A Constantine D. Polychronopoulos
%Z CSRD, U. Ill.
%T The Impact of Run-Time Overhead on Usable Parallelism
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 108-112
%K Multiprocessor Issues, tasking, DOALL, fork, critical task size,
modeling,

%A Jon A. Solworth
%Z U. Ill, Chicago Circle
%T The Microflow Architecture
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 113-117
%K Multiprocessor Issues, transaction processing,
MTPS (Millions of Transmissions Per Second), MIMD, send communication,
switch, message passing, extremely fine grain, window protocol, full/empty bit,

%A C. Scheurich
%A M. Dubois
%Z USC, dubois@priam.usc.edu
%T Concurrent Miss Resolution in Multiprocessor Caches
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 118-125
%K Multiprocessor Issues, memory access, dead lock free, hardware protection,
cache coherence, ordering, Miss Information/Status Holding Registers (MSHR),

%A Anselmo A. Lastra
%A C. Frank Starmer
%Z Duke, U.
%T POET: A Tool for the Analysis of the Performance of Parallel Algorithms
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 126-129
%K Multiprocessor Issues, C, simulation, Butterfly, transfer statement,
prediction of execution times (POET), message passing,
shared and local variables,

%A Qing Yang
%A Laxmi N. Bhuyan
%Z U. of SW Louisiana
%T A Queueing Network Model for a Cache Coherence Protocol on Multiple-bus
Multiprocessors
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 130-137
%K Multiprocessor Cache Coherence, memory latency, queueing network model,
bus transaction, hazards, routing,

%A Hoichi Cheong
%A Alexander V. Veidenbaum
%Z CSRD, U. Ill.
%T Stale Data Detection and Coherence Enforcement Using Flow Analysis
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 138-145
%K Multiprocessor Cache Coherence, relaxed determining sequence (RDS),
post-access, pre-access, selective, and fast selective invalidation schemes,

%A Michel Dubois
%A Jin-Chin Wang
%Z USC, dubois@priam.usc.edu
%T Shared Data Contention in a Cache Coherence Protocol
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 146-155
%K Multiprocessor Cache Coherence, multithreading, critical section,
semi-critical section, analytic model, effect of cache block size,
iterative Jacobi, SOR, quicksort, shuffling and non-shuffling FFT,

%A Thomas L. Sterling
%A Albert J. Musciano
%A Donald J. Becker
%A Randy B. Osborne
%T Multiprocessor Performance Measurement Using Embedded Instrumentation
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 156-165
%K Multiprocessor Performance, Concert, RingBus,
system software monitors (SySM),
degradation due to latency and arbitration (DLA), contention, starvation,
overhead, latency, SPOC Simultaneous Pascal, MultiLISP,
YARC, practical static dataflow,

%A Santosh G. Abraham
%A Timothy A. Davis
%T Blocking for Parallel Sparse Linear System Solvers
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 166-173
%K Multiprocessor Performance, Alliant FX/8, block solve algorithm,
shared memory, global communication delays,
%X Contrasted to pairwise solve (Psolve) and Given's reduction.

%A R. T. Dimpsey
%A R. K. Iyer
%Z Coordinated Science Lab, U. Ill.
%T Performance Analysis of a Shared Memory Multiprocessor: A Case Study
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 174-181
%K Multiprocessor Performance, Alliant FX/8, Xylem operating system, Cedar,
measurements, state transition model,
%X It is important to note that these are NOT Concentrix results!

%A Ravi Mukkamala
%A Roger K. Shultz
%T Performance Comparison of Two Multiprocessor B-Link Tree Implementations
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 182-186
%K Networks, cyclic processing power (CPP), shared resource manager (SRM),
%X Two simulated architectures.

%A J. C. Bermond
%A J. M. Fourneau
%T Independent Connections: An Easy Characterization of Baseline-equivalent
Multistage Interconnection Networks
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 187-190
%K Networks, topological properties and equivalence, graph characterization,
multistage interconnection digraph (MI-digraph),
permutation induces by a permutation on index digits (PIPID),

%A Tomas Lang
%A Lance Kurisaki
%Z UCLA
%T Nonuniform Traffic Spots (NUTS) in Multistage Interconnection Networks
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 191-195
%K Networks, MIN, MIMD, Omega network, performance evaluation by simulation,
traffic patterns, diverting switch,

%A Rajendra Boppana
%A C. S. Raghavendra
%Z USC
%T On Self Routing in Benes and Shuffle/Exchange Networks
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 196-200
%K Networks, delay time = routing time, proof of correctness,

%A Gyungho Lee
%A Sizheng Wei
%Z U. of SW Louisiana
%T Design and Analysis of A Fault-Tolerant Multistage Interconnection Network
for Large-Scale Shared Memory Parallel Computers
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 201-204
%K Networks, MIN, reduced size interconnection (RSI), intermediate stages,
reliability, performance, cost, mean time to failure (MTTF),

%A Russ Miller
%A V. K. Prasanna-Kumar
%A Dionisios I. Reisis
%A Quentin F. Stout
%T Data Movement Operations and Applications on Reconfigurable VLSI Arrays
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 205-208
%K Networks, mesh, bus, dynamic reconfiguration, CRCW PRAM,
content addressable array parallel processor (CAAPP), SIMD,
simulation, graph, and image applications, theorems,

%A Kaoru Uchida
%A Tsutomu Temma
%Z NEC
%T A Pipelined Dataflow Processor Architecture Based on a Variable Length
Token Concept
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 209-216
%K Dataflow, static, VLT,
inter-token synchronization and communication overhead,
template-controlled image processor (TIP) with variable length token (V-TIP),
NEC ImPP, NEC uPD7281, vector data, FFT, spatial filtering,
character recognition applications,

%A Philip C. Chao
%A Ming Y. Chern
%Z AT&T, Naperville
%T A Dynamic Dataflow Architecture for Image Generation
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 217-224
%K Dataflow, dynamic, graphics, Y-clipping, ray tracing,
object model storage (OMS), analytic load model (PANACEA), performance,

%A Thomas L. Sterling
%A Ellery Y. Chan
%Z Harris Corp.
%T A Practical Static Data Flow Computer Based on Associative Methods
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 225-234
%K Dataflow,

%A Peter M. Maurer
%Z U of S. FL.
%T Mapping the Data Flow Model of Computation into an
Enhanced Von Neumann Processor
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 235-239
%K Dataflow, Split and Merge (SAM) architecture, dynamic,
multiple runtime environments, synchronization, streams, Petri,
%X Don't expect a language paper.

%A Israel Gottlieb
%Z Bar Ilan Univ., Tel Aviv
%T Dynamic Structured Dataflow: Preserving the Advantages of Sequential
Processing in a Data Driven Environment
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 240-243
%K Dataflow, DSDF, context initiation, execution discipline, theory paper,

%A Paraskevas Evripidou
%A Jean-Luc Gaudiot
%Z USC
%T Iterative Algorithms in a Data-Driven Environment
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 244-248
%K Dataflow, graph construction, transformation, FORALL, DOALL, repeat-until,
Jacobi linear systems example, simulation, priority mechanism,

%A S. N. Jean
%A C. W. Chang
%A S. Y. Kung
%T Graceful Degradation Schemes for Static/Dynamic Dataflow Processor Arrays
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 249-255
%K Dataflow, static and synamic, routing control, fault tolerance, 2-D grid,
mesh, VLSI, WSI, simulated using Monte Carlo,

%A Jean-Luc Gaudiot
%A Sukhan Lee
%A Andrew Sohn
%Z USC
%T Data-Driven Multiprocessor Implementation of the Rete Match Algorithm
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 256-260
%K Dataflow, working memory elements (WME), production systems, simulation,

%A Anthony P. Reeves
%A Maria Gutierrez
%T On Measuring the Performance of a Massively Parallel Processor
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 261-270
%K Parallelism, MPP, FFT, convolution, mappings and permutations,
shuffle, exchange, shift, transfer, butterfly,

%A Anoop Gupta
%A Charles L. Forgy
%A Dirk Kalp
%A Allen Newell
%A Milind Tambe
%T Parallel OPS5 on the Encore Multimax
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 271-280
%K Parallelism, production systems, PSM-E, Rete match, OPS5->C,
benchmarks: weaver, rubik, tourney,

%A Lawrence Snyder
%Z U. Washington
%T A Taxonomy of Synchronous Parallel Machines
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 281-285
%K Parallelism, I-stream, D-stream, theory,
%X While this paper is interesting, it does not mention the other
significant taxonomies by Handler, the chemistry like taxonomy
of Hockney and Jesshope, and others.
To quote: "The crucial idea is to recognize that a reference stream is
composed of both values and addresses: ... synchronous execution is
NOT a defining property of computer architectures ... a derived property."
Uses a double subscripting notation of I and D to show sizes (addresses).

%A Won Ho Chung
%A Ha Ryoung Oh
%A Hyung Lee-Kwang
%A Kyu Ho Park
%A Myunghwan Kim
%Z KAIST
%T Parallel Execution Schemes in a Petri Net
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 286-290
%K Parallelism, graph models, lock step synchronization scheme (LSS),
[extended] partial state branching (PSB, XPSB), AND/OR reachability,
concurrency metrics: degree, decision degree, concurrency to decision ratio,

%A Hideo Wada
%A Koichi Ishii
%A Shigeko Yazawa
%A Shun Kawabe
%Z Hitachi Kanagawa Works
%T High-Speed Vector Instruction Execution Schemes of HITACHI
Supercomputer S-820 system
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 291-298
%K Commercial Systems, vector, IBM compatible (pre-3090), uniprocessor,

%A D.A. Calahan
%Z U. of Mich.
%T Characterization of Memory Conflict Loading on the CRAY-2
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 299-302
%K Commercial Systems, bank conflict, quadrant conflict,
empirically derived model, vector processing, scatter gather,
non unit stride, super scalar probe,

%A Tom Lovett
%A Shreekant Thakkar
%Z Sequent
%T The Symmetry Multiprocessor System
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 303-310
%K Commercial Systems, Weitek, up to 30 PE, 240 MB, bus,
write through and copyback cache, performance graphs,

%A Steve Reinhardt
%Z Cray Research
%T Two Parallel Processing Aspects of the Cray Y-MP Computer System
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 311-314
%K Commercial Systems, vector MIMD multiprocessor, 6 ns cycle, 8/32,

%A Shyh-Kwei Chen
%A Chung-Ti Liang
%A Wei-Tek Tsai
%Z U. Minn.
%T Loops and Multi-Dimensional Grids on Hypercubes:
Mapping and Reconfiguration Algorithms
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 315-322
%K Hypercubes, VLSI systolic, failure model, embedded loops, recovery,
reconfiguration algorithms,

%A Laurence Boxer
%A Russ Miller
%T Dynamic Computational Geometry on Meshes and Hypercubes
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 323-330
%K Hypercubes, data movement, MIN function,
transient behavior computation, convex hull, containment problems,
steady-state computations,

%A A. L. Narasimha Reddy
%A P. Banerjee
%A Santosh G. Abraham
%T I/O Embeddings in Hypercubes
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 331-338
%K Hypercubes, generalized interconnection networks, perfect embedding,

%A S. Chakravarty
%A S. J. Upadhyaya
%Z SUNY, Buffalo
%T A Unified Approach to Designing Fault-Tolerant Processor Ensembles
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 339-342
%K Fault Tolerance, processor ensembles (PEN), trees, meshes,
fault tolerant basic module (FTBM), pyramids, FTBM layout graph (FLG),

%A Seyed H. Hosseini
%Z U. Wisc., Milwaukee
%T Fault-Tolerant Scheduling of Independent Tasks and Concurrent
Fault-Diagnosis in Multiple Processor Systems
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 343-350
%K Fault Tolerance, fault (temporary and permanent) model,
group maximum matching algorithm, time complexity, disagreement graph, 

%A Miroslaw Malek
%A Kitty H. Yau
%Z U. Texas
%T The Resiliency Triple in Multiprocessor Systems
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 351-358
%K Fault Tolerance, multiplicity, robustness, configurability,
multiprocessor systems, hypercube, mesh, recovery, architecture graph G,
computation graph, length metrics,

%A Jing-Yang Jou
%A Jacob A. Abraham
%Z AT&T Bell Labs
%T Fault-Tolerant Algorithms and Architectures for Real Time Signal Processing
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 359-362
%K Fault Tolerance, weighed checksum code (WCC), data retry,
concurrent error detection,
%X Low overhead redundancy.

%A Kam Hoi Cheng
%Z U. of Houston
%T Efficient Designs of Priority Queue
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 363-366
%K Systolic Arrays, VLSI architectures, systolic systems, priority queue,

%A Nam Ling
%A Magdy A. Bayoumi
%Z U. of SW Louisiana
%T Algorithms for High Speed Multi-Dimensional Arithmetic and
DSP Systolic Arrays
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 367-374
%K Systolic Arrays, digital signal processing,
systematic transformation of algorithms for multi-dimensional systolic arrays
(STAMS), discrete Fourier transform (DFT), matrix-vector multiplication,

%A Hee Yong Youn
%A Adit D. Singh
%Z U. Mass.
%T A Highly Efficient Design for Reconfiguring the Processor Array in VLSI
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 375-382
%K Systolic Arrays, wafer scale integration, (WSI),
rectangular and tree architectures, redundancy, efficiency,
comparison, hierarchy, maximum edge length,

%A Alok N. Choudhary
%A Janak H. Patel
%Z CSL, U. Ill.
%T A Parallel Processing Architecture for an Integrated Vision System
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 383-387
%K Systolic Arrays, SIMD, NETRA, SIMD or MIMD or systolic, DSP,
convolution, feature matching, counting,

%A K. Q. Yan
%A Y. H. Chin
%Z Taiwan
%T An Optimal Solution for Consensus Problem in an Unreliable
Communications System
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 388-391
%K Reliability, FLINK protocol, model, matrix multiply, impossibility,

%A J.J. Macaluso
%A Chita R. Das
%A Woei Lin
%Z Penn. State
%T A Reliability Predictor for MIN-Connected Multiprocessor Systems
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 392-399
%K Reliability, multistage interconnection networks, unique path,
inherent redundancy, simulation, search and reach algorithm,
reliability to cost ratio (RCR),

%A Chung-Yang Chiang
%A Chuan-lin Wu
%Z U. Texas
%T Adaptive Checkpointing and Rollback in Multiprocessor Systems
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 400-403
%K Reliability, shared memory and message passing, recovery,

%A S. G. Mitra
%A R. K. Iyer
%Z CSRD, U. Ill.
%T Measurement-Based Analysis of Multiple Errors and Near-Coincident
Fault Discovery in a Shared Memory Multiprocessor
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 404-409
%K Reliability, alliant FX/8, error latency simulator (ELS),
multiple latent error identifier (MLEI),
near-coincident fault discovery identifier (NCFI), simulation and measurement,

%A Uri Baron
%A Bounthara Ing
%A Michael Ratcliffe
%A Philippe Robert
%Z ECRC, West Germany
%T A Distributed Architecture for the PEPSys Parallel Logic Programming System
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 410-413
%K Logic Programming and Pipelined Systems, multi-cluster, cluster processor,
load balancing, eight queens performance,

%A A. V. S. Sastry
%A L. M. Patnaik
%Z India Inst. of Science, Bangalore
%T A Dataflow Architecture for OR-Parallel Execution of Logic Programs
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 414-421
%K Logic Programming and Pipelined Systems, argument parallelism,
declarative semantics, multiple binding environment, Horne clause,
deferred read mechanism, unify, search, copy,

%A D. T. Harper, III
%A D. A. Linebarger
%Z U. Texas, Dallas
%T Storage Schemes for Efficient Computation of a Radix 2 FFT in a
Machine with Parallel Memories
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 422-425
%K Logic Programming and Pipelined Systems, bit-reversed access vectors,
digial signal processing, paper performance study,

%A Lingtao Wang
%A Chuan-lin Wu
%Z U. Texas
%T Distributed Instruction Set Computer
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 426-429
%K Logic Programming and Pipelined Systems, DISC, post compiling,
instruction dispatcher (ID), instruction network (INET), functional units (FU),
distributed instruction set architecture (DISA), design, data network,
proposal

%A David Bernstein
%Z IBM TJW
%T An Improved Approximation Algorithm for Scheduling Pipelined Machines
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 430-433
%K Logic Programming and Pipelined Systems, list schedules, leveled schedules,
refined leveling (RL),

%A Ramesh Krishnamurti
%A Eva Ma
%T The Processor Partitioning Problem in Special Purpose Partitionable Systems
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 434-443
%K Reconfigurable Systems, MSIMD, MIMD, multiple sorting tasking, workload,
approximation algorithm,

%A Samuel A. Fineberg
%A Thomas L. Casavant
%A Thomas Schwederski
%A H.J. Siegel
%T Non-Deterministic Instruction Time Experiments on the PASM System Prototype
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 444-451
%K Reconfigurable Systems, variable length SIMD, hybrid S/MIMD, speedup,
efficiency, problem size, matrix multiplication, utilization, partitionable,

%A M. H. Sunwoo
%A J. K. Aggarwal
%Z U. Texas
%T Flexibly Coupled Multiprocessors for Image Processing
%J Proceedings of the 1988 International Conference on Parallel Processing
%V I, Architecture
%I Penn State
%C University Park, Penn
%D August 1988
%P 452-461
%K Reconfigurable Systems, FCM II, tight, loose, hypercube, Intel,
variable space memory scheme, application, region labeling, MIMD,
communication (PE-PE, CU-PE, broadcast),
median filtering, pseudo binary tree,