[comp.parallel] On-chip/Off-chip caches

jaya@cpsin2.cps.msu.edu (11/02/89)

I would like references on on-chip/off-chip cache with respect
to the following characteristics:

(1) Typical size as of now
(2) Increase in size each year due to technology advances
(3) Cache management policies, whether policies at the two
    levels are (in)dependent
(4) Cache organization, again whether org at the two
    levels are (in)dependent.

Thanks,
Jayashree
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Jayashree Ramanathan		 E-mail: 
Graduate Assistant		 jaya@cpsin.cps.msu.edu (ARPAnet and CSnet)
Dept. of Computer Science	 jaya@msuegr.BITNET
Michigan State University	 uunet!frith!jaya
East Lansing MI48824
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