tdl (11/29/82)
I submitted the following article to "net.arch", which is
where I think it belongs, but I didn't get any response.
Is that newsgroup for real? Maybe someone in this group has
some info.
-------------------------------------------------------------
Has anyone else seen the 11/17 issue of Electronics
magazine? There is an article on RISC (and Patterson didn't
even write it!). The interesting part is the companion
article with quotes from Rattner about the 432. He says
that the 432 is really not that different from the RISC.
Who is he trying to kid? I can't believe he feels that he
has to defend his design like that. The two approaches are different;
period. If he wants to defend his design he should point out
its advantages.
He also says that the 432 is vertically microcoded,
"like RISC", and that most instructions execute in a single CPU
cycle. One, I can't believe that RISC is vertically microcoded, and two,
I can't believe that any of the 432's instructions execute in one cycle.
(Well, maybe NOPs)
Any comments or facts?
Tom Lovett
Bell Labs at Freehold, NJ
houxh!tdl