aglew@oberon.crhc.uiuc.edu (Andy Glew) (08/01/90)
Can anyone answer a question about Convex's ASAP parallel processing
architecture? (I recently read an article about it in Computer
Technology Review, which resurfaced old questions I'd had about ASAP):
As I understand it, idle or "ready" processors continually scan the
communications registers looking for new tasks to execute. A
communications register set contains the PC and the virtual memory
mappings.
Does the communications register set contain all the normal
registers of the Convex processor - general purpose scalar registers
and vector registers? Or is it assumed that state is stored in memory?
If the communications registers do contain the regular registers,
does saying FORK n imply that all of them get copied n times? (I
doubt it, given the quoted performance).
If the communications registers do not contain the regular
registers, doesn't this constrain the values that can be placed in the
normal registers throughout a loop? Eg. doesn't there need to be
special handling for a loop invariant that is to be placed in a
register?
--
Andy Glew, andy-glew@uiuc.edu
Propaganda:
UIUC runs the "ph" nameserver in conjunction with email. You can
reach me at many reasonable combinations of my name and nicknames,
including:
andrew-forsyth-glew@uiuc.edu
andy-glew@uiuc.edu
sticky-glue@uiuc.edu
and a few others. "ph" is a very nice thing which more USEnet
sites should use. UIUC has ph wired into email and whois (-h
garcon.cso.uiuc.edu). The nameserver and full documentation are
available for anonymous ftp from uxc.cso.uiuc.edu, in the net/qi
subdirectory.