grob@cmcl2.NYU.EDU (Lori S. Grob) (03/29/88)
- - -
Call for Papers
Workshop on UNIX and Supercomputers
Westin William Penn Hotel
Pittsburgh, Pennsylvania
September 26-27, 1988
Sponsored by the USENIX Association
A large number of supercomputers are now or will in the future be running
UNIX as their primary operating system. This is the first workshop to
consider the general problems of running UNIX on supercomputers, and will
cover topics both practical and abstract. Areas of specific interest
include but are not limited to:
Systems administration
Archiving
Scheduling
File systems
Networking and network protocols
Job batching systems
Monitoring Performance/parallelism
Programming languages and environments
Fast file I/O
Shared memory management
IPC
Very large files
Checkpoint-restart
The workshop will include both shorter presentations and full-length
papers, and there will also be tours of Pittsburgh Supercomputing
Center and Westinghouse Energy Center facilities and a reception at
the Pittsburgh Supercomputing Center. Workshop proceedings will be
available at the Workshop.
If you are interested in presenting either a full paper or a brief
discussion of your current work, please send an abstract of your paper
or presentation to Melinda Shore by July 15, 1988 . If you are sending
your submission by US Mail, please send three copies. All submissions
will be acknowledged.
Program Co-chairs:
Lori Grob
NYU Ultracomputer Research Lab
715 Broadway, 10th Floor
New York, NY 10003
(212)998-3339
grob@lori.ultra.nyu.edu
Melinda Shore
Pittsburgh Supercomputing Center
4400 Fifth Avenue
Pittsburgh, PA 15213
(412)268-5125
shore@reason.psc.edubill@gatech.edu (Bill Appelbe) (04/21/88)
CALL FOR PAPERS
HAWAII INTERNATIONAL CONFERENCE ON SYSTEM SCIENCES - 22
High Performance Architectures
KAILUA-KONA, HAWAII - JANUARY 3-6, 1989
The Architecture Track of HICSS-22 will contain a series of
papers focusing upon Architectures which are at the leading
edge of the performance/price curve. Such systems are
variously classified as:
o Mini-supercomputers
o Super-minicomputers
o High performance workstations
Examples of such systems/manufactures include, but are not
limited to:
o Convex, Alliant, Warp, RP-3
o Sequent, Multiflow
o Ardent, Stellar, Sillicon Graphics, SUN, Apollo, MIPs
Their rationale, design tradeoffs, and performance is in-
tended to be a major focus in this mini-track. The majority
of the information available about such architectures tends
to focus upon simple performance benchmarks and metrics,
such as Whetstones, Dhrystones, MIPs, MFLOPs, etc., which
unfortunately muddle the issues of architecture, hardware,
compilers, and applications.
From a researcher's viewpoint the major issues are why the
design and its associated compromises were adopted, and how
well the architecture matches a spectrum of hardware, lan-
guages, and applications. From a users viewpoint the major
issues are what the performance of the architecture can ac-
tually deliver for a given application.
Papers are invited that give an analysis of high-performance
architectures, from either a developer's or user's perspec-
tive. For example:
o How do existing high-performance architectures effec-
tively exploit hardware and applications character-
istics to yield high performance.
o What are the rationale and design tradeoffs to bal-
ance
- High performance for a range of applications
- Low design, manufacturing costs
- Ease of evolution to match rising hardware per-
formance
- Architectures designed to enhance software and
applications portability
o How can high-performance architectures be instru-
mented and meaningfully compared?
o How do projected continued hardware advances affect
the evolution of current high-performance architec-
tures?
HICSS-22 is sponsored by the University of Hawaii in coop-
eration with the ACM, the Computer Society, and the
Pacific Research Institute for Information Systems and Man-
agement (PRIISM).
INSTRUCTIONS FOR SUBMITTING PAPERS
Manuscripts should be 22-26 typewritten, double-spaced
pages in length. Do not send submissions that are sig-
nificantly shorter or longer than this. Papers must not
have been previously presented or published, nor cur-
rently submitted for journal publication. Each manu-
script will be put through a rigorous refereeing
process. Manuscripts should have a title page that in-
cludes the title of the paper, full name of its
author(s), affiliation(s), complete physical and elec-
tronic address(es), telephone number(s) and a 300-word
abstract of the paper.
DEADLINES
o A 300-word abstract is due by May 10, 1988.
o Feedback to author concerning abstract by May 15,
1988.
o Six copies of the manuscript are due by June 6, 1988.
o Notification of accepted papers by September 1,
1988.
o Accepted manuscripts, camera-ready, are due by Octo-
ber 3, 1988.
SEND SUBMISSIONS AND QUESTIONS TO
Bill Appelbe, Associate Professor
School of Information and Computer Science
Georgia Tech
Atlanta GA 30332-0280
Phone: (404)-894-6187
INTERNET: bill@gatech.edu
UUCP: ...!gatech!bill
--
Bill Appelbe
School of Information & Computer Science, Georgia Tech, Atlanta GA 30332
CSNet: bill @ GATech ARPA: bill%GATech.CSNet @ CSNet-Relay.ARPA
uucp: ...!{akgua,allegra,hplabs,ihnp4,linus,seismo,ulysses}!gatech!billhwang@blake.acs.washington.edu (Jenq-Neng Hwang) (01/05/90)
INTERNATIONAL CONFERENCE on APPLICATION SPECIFIC ARRAY PROCESSORS (ASAP90) Princeton, NJ, U.S.A. September 5-7, 1990 The title reflects the expanded interest (from the previous name: Systolic Arrays) in highly-parallel algorithmically-specialized processors as well as the applications-driven nature of contemporary systems. The topics of interest include the following: Applications-Specific Architectures Algorithms for Application-Specific Computing Applications that Require Specific Computing Systems Software for Applications-Specific Computing Hardware for Applications-Specific Computing Design Methodology for Applications-Specific Parallel Processing Prospective authors are invited to submit five copies of their full papers by February 1, 1990. Submissions of full papers are encouraged but five page (doublespaced) summaries will be considered. Full papers are due by June 1, 1990 for inclusion in the hard bound Conference Proceedings. Papers should be submitted to: Cathy Tanner (ASAP90) School of Electrical Engineering Purdue University West Lafayette, IN 47907 For further information, please contact Professor S. Y. Kung Princeton University (609) 258-3780 E-Mail: Kung@Princeton.EDU
yxt3@po.CWRU.Edu (Yoshiyasu Takefuji) (02/09/91)
CALL FOR PAPERS
Journal Analog Integrated Circuits and Signal Processing (AICSP)
Special Issue
on
Analog VLSI Neural Networks
Papers are solicited for a special issue of the Journal Analog Integrated
Circuits and Signal Processing (AICSP) covering the growing area of
artificial neural networks to be published in September 1992.
The special issue will cover all aspects of analog VLSI neural networks.
Topics of interest include, but are not limited to, the following:
*VLSI analog/digital systems
*Tradeoffs of analog/digital systems
*Novel applications in signal processing, optimization, and others
*Wafer scale integrated systems
*Artificial neuron/synaptic models and implementations
*On-line learning hardware.
Six copies of complete manuscripts should be sent to Yoshiyasu Takefuji by
December 15, 1991.
Guest Editor: Prof. Yoshiyasu Takefuji
Dept. of Electrical Engineering
Case Western Reserve University
Cleveland, OH 44106, USA
Phone: 216-368-6430
Fax: 216-368-2668
Internet: takefuji@axon.eeap.cwru.edu
Instructions for authors can be obtained from the guest editor or by
contacting Kluwer at the following address.
Karen S. Cullen
Kluwer Academic Publishers
101 Philip Drive
Norwell, MA 02061, USA
Tel. (617) 871-6300 fax (617) 871-6528
Email Karen@world.std.comokafuji@ics.osaka-u.ac.jp (Okafuji Kouki) (02/21/91)
I want to get latest papers which say on triangularization of general and Toeplitz matrices. |---------------------|---------|---------|---------|---------| | number of processor | 1 | n | n*n | n*n*n | |---------------------|---------|---------|---------|---------| | general matrix | n*n*n | | n? |logn*logn| | | (n*n*n) | (n*n) | (n) | (1) | |---------------------|---------|---------|---------|---------| | Toeplitz matrix | n*n | n | logn | | | | (n*n) | (n) | (1) | | |---------------------|---------|---------|---------|---------| Above table is correct ? Notes : matrix is n*n ( ) is lowerbound append order to number I already have "Systolic Triangularization over Finite Fields" Michel Cosnard, Jean Duprat, and Yves Robert 1990 "Linearly Connected Array for Toeplitz Least-Squares Problems" A.W.Bojanczyk, R.P.Brent, and F.R.de Hoog 1990 "Fast Parallel Polynomial Division via Reduction to Triangular Toeplitz Matrix Inversion and to Polynomial Inversion Modulo a power" Dario Bini, and Victor Ya.Pan 1985 "Efficient Systolic Arrays for the Solution of Toeplitz Systems" Jean-Marc Delosme, Ilse C.F.Ipsen 1985 "Parallel Solution of Certain Toeplitz Linear Systems" Dario Bini 1984 Please Help Me!
yxt3@po.CWRU.Edu (Yoshiyasu Takefuji) (04/27/91)
CALL FOR PAPERS
Journal Analog Integrated Circuits and Signal Processing (AICSP)
Special Issue
on
Analog VLSI Neural Networks
Papers are solicited for a special issue of the Journal Analog Integrated
Circuits and Signal Processing (AICSP) covering the growing area of
artificial neural networks to be published in September 1992.
The special issue will cover all aspects of analog VLSI neural networks.
Topics of interest include, but are not limited to, the following:
*VLSI analog/digital systems
*Tradeoffs of analog/digital systems
*Novel applications in signal processing, optimization, and others
*Wafer scale integrated systems
*Artificial neuron/synaptic models and implementations
*On-line learning hardware.
Six copies of complete manuscripts should be sent to Yoshiyasu Takefuji by
December 15, 1991.
Guest Editor: Prof. Yoshiyasu Takefuji
Dept. of Electrical Engineering
Case Western Reserve University
Cleveland, OH 44106, USA
Phone: 216-368-6430
Fax: 216-368-2668
Internet: takefuji@axon.eeap.cwru.edu
Instructions for authors can be obtained from the guest editor or by
contacting Kluwer at the following address.
Karen S. Cullen
Kluwer Academic Publishers
101 Philip Drive
Norwell, MA 02061, USA
Tel. (617) 871-6300 fax (617) 871-6528
Email Karen@world.std.com
--
=========================== MODERATOR ==============================
Steve Stevenson {steve,fpst}@hubcap.clemson.edu
Department of Computer Science, comp.parallel
Clemson University, Clemson, SC 29634-1906 (803)656-5880.mabell