[net.micro] DEC SBC-11/21

eric (12/09/82)

Has anyone else had any experience with the following
DEC SBC-11/21 (Falcon) bug?
After about 50 hours of use the MFPS instruction returns all the
condition code bits as zero.  The PSW pushed on the stack during interrupt
or trap processing also has all the condition codes zero.

For example:
	mtps	$17
	mfps	r0
	halt
leaves 0 in r0.

Another example:
	mov	$1f,14		/ set up bpt vector
	sec | sen | sev | sez	/ set all condition codes
	bpt
1:
	halt
The PSW pushed by the bpt has the bottom 4 bits zero.

The power-supply voltages are all within spec.
Cooling is provided by 2 'muffin' fans.
Environmental conditions are within spec.

This problem has shown up on 3 different SBC-11/21's.
Any information/help would be greatly appreciated.

		Eric Norum
		(...!harpo!utah-cs!sask!hssg40!adec23!eric)