ewhac@well.UUCP (Leo 'Bols Ewhac' Schwab) (04/07/88)
In article <2760@crash.cts.com> haitex@pnet01.cts.com (Wade Bickel) writes: > I've been trying to move my interrupt mechanism from the VBlank chain to >the High priority Copper pin. According to my RKM the pin is at bit 14 of the >INTREQ register, but my hardware manule claims this pin is the master >enable/disable bit. What's the story. > You should believe whatever the .h files say. Checking my copy, I see the following: #define INTF_COPER (1<<4) Incidentally: #define INTF_SETCLR (1<<15) /* Not 14 */ _-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_-_ Leo L. Schwab -- The Guy in The Cape ihnp4!pacbell -\ \_ -_ Recumbent Bikes: dual ---> !{well,unicom}!ewhac O----^o The Only Way To Fly. hplabs / (pronounced "AE-wack") "Work FOR? I don't work FOR anybody! I'm just having fun." -- The Doctor
avery@puff.cs.wisc.edu (Aaron Avery) (04/08/88)
In article <5613@well.UUCP> ewhac@well.UUCP (Leo 'Bols Ewhac' Schwab) writes: > Incidentally: > >#define INTF_SETCLR (1<<15) /* Not 14 */ True, but by 'master enable/disable', he meant: #define INTF_INTEN (1<<14), the enable/disable all interrupts bit. nag, nag, nag; nitpick, nitpick, nitpick... :-) :-) -- Aaron Avery (avery@puff.cs.wisc.edu) ({seismo,caip,allegra,harvard,rutgers,ihnp4}!uwvax!puff!avery)
dillon@CORY.BERKELEY.EDU (Matt Dillon) (04/08/88)
>True, but by 'master enable/disable', he meant: >#define INTF_INTEN (1<<14), >the enable/disable all interrupts bit. Which is, by the way, what Disable() and Enable() fool around with... but they also keep a count of the number of calls to Disable/Enable() (i.e. they nest), so you should use them for compatibility with the rest of the system. -Matt