bobvan (12/10/82)
I had occasion to use an AMD 9511 back in 1979 when the firm I worked for was interfacing it to a Basic interpreter. My memory is a little foggy, but I think we concluded that software floating point routines were faster. I think we were comparing a 1 MHz 9511 against floating point software on a 2 MHz 8080. We were using a 32-bit binary format and the routines had been tuned for speed. I even had a special routine for floating point increment that was used to speed up the Basic "for" statement. These days, a 5 MHz 8085 or a 6 MHz Z-80B could probably run rings around a 9511 (given a good f.p. package). However, the new math "co-processors" that are available today are an entirely different story. Intel has one now, Motorola has one in the works. These chips monitor the CPU instruction stream and execute the f.p. instruction opcodes as they go by. They have access to the necessary CPU registers so that they can begin execution immediately. As I recall, one of the places the 9511 lost big was in the CPU time needed to copy the arguments between the interpreter's expression evaluation stack and the registers on the 9511. Loading and unloading the arguments turned out to take almost as long as just doing the f.p. computation in software. Bob Van Valzah (...!decvax!ittvax!tpdcvax!bobvan)