limonce@pilot.njin.net (Tom Limoncelli) (11/21/89)
In article <8652@cbmvax.UUCP> daveh@cbmvax.UUCP (Dave Haynie) writes: > With fast memory and DMA, you only need one cycle to chip memory, at > worst, to get unrestricted access to fast memory at full bus speeds. > With CPU driven I/O, you'll need a few cycles, since interrupt ^^^^^^^^^^^^^^^ > vectors are currently stored in chip memory, but it's not that bad. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > Some devices may not work at acceptible rates with hires 4 plane > overscan screens if you only have chip memory. With a little fast > memory, there's not a big problem. This has always irked me. When AmigaDOS added official support for the 680x0 (where x<>0) chips, I was surprised that they didn't move the interrupt vectors to fast memory (since the 68010 and up can do that). Chip memory is prone to trashing by errant programs (blitter-tricks gone bad, beginning programmer mistakes, etc.) Might this be a feature of 1.4? It could be a switch in preferences to keep older working. > Dave Haynie Commodore-Amiga (Systems Engineering) "The Crew That Never Rests" -- Tom Limoncelli -- limonce@pilot.njin.net Standard Disclaimer CM 1060 -- tlimonce@drunivac.bitnet P O Box 802 -- ...!rutgers!njin!drew!tlimonce Madison, NJ 07940 -- 201-408-5389 "I do not like green eggs and spam, I do not like them, Sam I am!"