uzun@pnet01.cts.com (Roger Uzun) (11/22/89)
What type and size of DRAMS will the new C= A2630 board be using.
Will it be 256kX4 80 ns DRAMS?
ZIP Package?
-Roger
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INET: uzun@pnet01.cts.comdaveh@cbmvax.UUCP (Dave Haynie) (11/23/89)
in article <749@crash.cts.com>, uzun@pnet01.cts.com (Roger Uzun) says: > What type and size of DRAMS will the new C= A2630 board be using. > Will it be 256kX4 80 ns DRAMS? > ZIP Package? 256k x 4, 100ns, same as on the A2620. ZIP package. It holds the same 4 meg on board. Only difference is that it supports a daughterboard (none announced from Commodore-Amiga) that can have up to 64 megabytes on it (I've got no idea how you'd stuff 64 megabytes onto such a daughterboard, but there's the space for it in case anyone figures it out). Maybe 4 meg ZIPs or SIMMs. Even Bill Koester would have to work extra hard to use up 68 megs of 32 bit memory. > -Roger -- Dave Haynie Commodore-Amiga (Systems Engineering) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy Too much of everything is just enough
dwi@manta.NOSC.MIL (Steve Stamper) (11/24/89)
Will the A2630 board allow faster DRAMS on board like the A2620? Seems at 25Mhz 100ns would mean a lot of wait states. If faster DRAMS are used how fast should they be? 90 ns or 80 ns? I presume one would have to remove the 2M of DRAM installed by the factory to put in faster RAM on the system. I am planning to get one as soon as I can and would like to outfit it with 4M of the fastest DRAMS I can. -Roger
kuan@iris.ucdavis.edu (Francisco Kuan) (11/28/89)
How many wait states does it have? How does it compare with the GVP 68030 board?
daveh@cbmvax.UUCP (Dave Haynie) (11/28/89)
in article <961@manta.NOSC.MIL>, dwi@manta.NOSC.MIL (Steve Stamper) says: > Will the A2630 board allow faster DRAMS on board like the A2620? After a fashion. The timing is adjustable, but requires a change to a PAL or a delay line. I'll probably work out some of the more interesting configurations when I have a few free seconds. Mabye next March... > Seems at 25Mhz 100ns would mean a lot of wait states. Two asynchronous cycle wait states. > If faster DRAMS are used how fast should they be? 90 ns or 80 ns? With the proper setup, it's possible to go a clock faster with good 80ns DRAM, though I'm not sure all 80ns parts are fast enough (you're cutting 40ns off the entire cycle time, not just 20ns off the row address access time). > I presume one would have to remove the 2M of DRAM installed > by the factory to put in faster RAM on the system. Well, yes, but... > I am planning to get one as soon as I can and would like > to outfit it with 4M of the fastest DRAMS I can. Before hacking my A2630 to bits, I'd wait a little and see who makes daughterboards for them. The daughterboard memory isn't DMAable, but it could be run 0 wait states, and it can even support a tack-on cache instead of additional memory. Commodore has no current plans to build an add-on memory board, but we did release the specs and a couple of 3rd parties seem interested. The memory bank size and free space on such a daughterboard would lend itself well to a fast nybble mode memory design or even faster interleaved SCRAM design. > -Roger -- Dave Haynie Commodore-Amiga (Systems Engineering) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy Too much of everything is just enough