pkontkanen@cc.helsinki.fi (01/12/90)
I have read one memory cycle is approximately 280 ns in duration. Now I would like to know how many cycles each machine language instruction takes. Is the number of cycles same as the number of words the instruction allocates? Petri Kontkanen The University of Helsinki,Finland
MARKV@kuhub.cc.ukans.edu (MARK GOODERUM - UNIV. OF KANSAS ACS - MARKV@UKANVAX) (01/13/90)
> I have read one memory cycle is approximately 280 ns in duration. Actually it is only 140 ns, but in CHIP RAM 68000 gets every other cycle, but in FAST RAM it gets every cycle. However lots of Amiga memory boards are 1 wait state, which means 280 ns read/write cycle. (Pretty easy to tell, if your memory board must have 120 ns chips then you are 0 ws, 150 is 1 ws). > Now I would like to know how many cycles each machine language > instruction takes. Is the number of cycles same as the number of > words the instruction allocates? Actually it takes a certain number of cycles for the instruction plus the number of cycles for read and write access. The number of cycles vary for each instruction. The values are available in the Motorola Reference manuals (which are reprinted in many 68000 assembly language books.) Note that the specific timings vary for each member of the 68000 family. Also bus size effects speed since a 68000 would take 2 read cycles to fetch a LONGWORD, but a 68020 w/32 bit RAM only takes 1. The situation gets even more confusing with the 68020/30 and their caches and pipelining. The net point is, instruction timings are interesting for curiosities sake and maybe comparing the relative merit of differnt chips, but on the Amiga you should NEVER NEVER NEVER count on the timings of instructions for anything. (Motorola doesn't even guarentee the timings will remain the same for the same chip (for instance some newer 68010/12's have faster timings then other 68010)). > Petri Kontkanen > The University of Helsinki,Finland ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Mark Gooderum Only... \ Good Cheer !!! Academic Computing Services /// \___________________________ University of Kansas /// /| __ _ Bix: markgood \\\ /// /__| |\/| | | _ /_\ makes it Bitnet: MARKV@UKANVAX \/\/ / | | | | |__| / \ possible... Internet: mark@kuhub.cc.ukans.edu ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
bdb@becker.UUCP (Bruce Becker) (01/14/90)
In article <1728.25ad4906@cc.helsinki.fi> pkontkanen@cc.helsinki.fi writes: | | I have read one memory cycle is approximately 280 ns in duration. | Now I would like to know how many cycles each machine language | instruction takes. Is the number of cycles same as the number of | words the instruction allocates? The Motorola MC680x0 proccessor manuals give this information in an appendix. The number of cycles are dependent on several things, too complex to enumerate here - it is worth pointing out in passing that as "x" gets larger in 680x0, the cycle time for many instructions gets shorter due to better processor internal architecture and improved microcode. Cheers, -- ,,,, Bruce Becker Toronto, Ont. w \$$/ Internet: bdb@becker.UUCP, bruce@gpu.utcs.toronto.edu `/c/-e BitNet: BECKER@HUMBER.BITNET _/ >_ "Money is the root of all money" - Adam