[net.micro] wrongo on the wait states for the 68000...

taylor (02/08/83)

Unlike John Gilmore and numerous others suggest, I have heard from some
excellent sources (engineers at Motorola) that the 68000 uses a pre-
fetch memory access system, so that while the CPU is  processing an in-
struction, it is simultaneously sending out a fetch instruction for the
next instruction (ie memory access is one cycle ahead of the instruction
that needs it)
	Given this system, the chip could run a HELL of a lot faster than
5Mhz.  I mean, if the damn thing had proper DMA (Direct Memory Access) it
could run as fast as a clock could pulse.

	(How do you chaps think that all the mainframes break the *cough*
5Mhz barrier?   (Even the Z80B can go faster!) (actually, I do realize that
the previous parenthetical comment does not apply, but what the heck!))

	Flame on high...

					-- Dave Taylor