danbabcock@eklektik.UUCP (/dev/ph1) (04/06/90)
This message is directed to K.C.Lee, but it's interesting enough I thought I'd better post it globally. The Mac has five track zones: track range / sectors per track / zone ----- ----- ------- --- ----- ---- 0-15 12 5 16-31 11 4 32-47 10 3 48-63 9 2 64-79 8 1 Zones one and two can be read by the Amiga disk controller without any special effort. Note that the zone designation is not neccessarily used by Apple; I just made it up for convenience. The Mac format is extremely similiar to that of the Apple II, so Beneath Apple DOS or Beneath Apple ProDOS are very useful. I'm surprised and pleased that you thought of controlling drive speed with software. It's really a great concept (although whether it is feasible remains to be proven). I worked on this last summer, so I can get you off to a good start. The first problem that arises is the fact that the drive motor signal can't normally be toggled without deselecting the drive. This causes data to be lost. If there weren't a fix for this, I wouldn't be typing this text now. It turns out that you can disable this feature, without creating any potential problems, with a simple jumper. I installed the jumper in my A1000 - what machine do you have? (so I can provide details pertinant to your situation). There are a couple other very interesting tidbits you should know. One, the motor line is connected to PB7!!!! I put the exlamation marks there because this line is VERY special to a CIA. It can be toggled or pulsed according to the countdown of one of the timers! That *suggests* the possibility of simply loading up the timer and reading from the Mac disk. (in reality, the read routine will undoubtedly be much more complicated). There's another interesting thing I found out. I found that I could read an entire sector of a Mac disk (zone 5) by simply letting the motor decelerate from 300 RPM to 0 RPM! Again, that *suggests* the possibility of reading a Mac disk rather easily. (at least in a one-shot conversion situation). I should mention that this is not the only way to slow down a drive motor on a standard drive. The other method is to vary the input voltage. This is exactly what the Cyclone copy hardware does (or so I am told). They use it to help them copy long track and nibble counting protection schemes, but it could also be used to read (and of course write) Mac disks! Of course, there is yet another method. One could design a floppy drive controller just like the Commodore 1541 drive, which can read and write at various rates. The so-called "data seperater" of the 1541 is completely digital and quite simple. A 16Mhz clock is an input to a programmable counter. Every time the counter counts down, a zero is read. A transition at any time is read as a one and resets the counter. Because the on-board CPU (a 6502) can write the countdown value to the counter chip, many data rates are easily supported. I have absolutely no idea how the Amiga disk controller works internally. If anyone has the schematics to Paula lying around, please provide some information (yes I am serious!). Of course, the OTHER method is to simply use a Mac 800K drive, which AUTOMATICALLY adjusts its speed depending on what track it is on (quite unlike the 400K drives, which required a special control pulse from the host). If anyone needs more methods to read a Mac disk, just let me know (grin!)... -- Dan Babcock 1106 Jefferson Road Pittsburgh, PA 15235 (412)-373-1753
<LEEK@QUCDN.QueensU.CA> (04/09/90)
Objective: To do a one time read of a MAC disk with Amiga drive.. In article <1518@eklektik.UUCP>, danbabcock@eklektik.UUCP (/dev/ph1) says: .... Ways to read MAC disk, MAC disk organization etc deleted .... >Of course, there is yet another method. One could design a floppy drive >controller just like the Commodore 1541 drive, which can read and write >at various rates. The so-called "data seperater" of the 1541 is completely >digital and quite simple. A 16Mhz clock is an input to a programmable >counter. Every time the counter counts down, a zero is read. A transition >at any time is read as a one and resets the counter. Because the on-board >CPU (a 6502) can write the countdown value to the counter chip, many data >rates are easily supported. ... Stuff deleted .... > >-- Dan Babcock > >1106 Jefferson Road >Pittsburgh, PA 15235 >(412)-373-1753 Hmmm. Thank you Dan !! I have came up with a simple design after reading your article above. Here is my proposal to a digital data separator.... ___________ ________ ________ _______ | | clk | | Q0-Q5 | COMP | | | D0-D5 | 8 MHz Clk |--+--|> 6-bit |======>| A B |<====| 6 bit |<===== Printer |___________| | | Counter| | | | latch | interface | | | | | |_______| | |_Reset__| |__A=B___| | ^ | _________V_ | | Raw | Edge | +--->-------------------------------------> CNT Data | detection |+> OR | In | & sync || +---<-------------------------+-----------> SP |___________|| | ______ | | | | | | +--------------+ +--| R Q |--+ CLK : CLOCK | | | COMP: Magnitude Comparator +--------| S | A=B : Input A = Input B |______| Sync: Synchronization circuit The 8 MHz clock source provide a reference timing signal to this system. The clock period is = 1/8MHz or 125 nS. A 6 bit free running counter is attached to the clock. The output value is compared with the stored value of the 6 bit latch. If the counter value equals to the latched value, the resulting signal is passed to the RESET input of a RS flipflop as well as the RESET pin of the counter (via a OR gate). The output of the FlipFlop is = 0. The 0 value is latched into the SP pin of the SERIAL PORT (SDR) with the help of the reset signal as the clock. If the input Edge detection circuit detects a transition, the RS FlipFlop is set and the SP pin now reads a 1. The counter is also reset via the OR gate. Note: Extra clocked logics are required to avoid timing problems. The 680X0 can change the data rate as it pleases by strobing in the 6 bit values through the printer interface. 6-bit value provide a bit cell of up to 7.8uS (the lower limit depends on the speed of the SDR.) The SDR is a synchronous serial interface in the perpherial chip. It is available through the printer interface. (Its is probably use as the serial interface for the C64 emulators.) The SDR in this case allows us to read in the raw data from the disk drive and grouped into 8-bit groups. The SDR is buffered and can be interrupt driven. (I would think the 62.5K/sec transfer rate might justify a polling I/O approach) The resultant raw data is dumped into a buffer and is decoded with the help of a table.... This is what I have in mind for the variable speed data separator... It should be able to read off almost any kind of disks. It might even read off DS/HD disk from a regular Amiga drive. Note that the SDR in the output mode is limited by the 02 clock for a data rate of 178K-bit/sec and is useless for writing to disk. I am sure someone would be able to fix that by hooking up a shift register off the printer port. Well. This is it. I'll take a look at the project as soon as I am free after my exams. Anyone else is welcome to use this idea as long as I am not to be blamed for any accidents. If you have questions or suggestions, please send me EMAIL. I'll read the netnews from time to time (even during the exams), but the local machine only keeps about 7 days or so worth.... :( K. C. Lee (: I do nor represent anybody nor any organizations. The views and ideas expressed above are either stolen or inspired by someone else. In any chance of an original idea, you are free to use it as long as you also share it with others. This message is type before an automated audiences. :)