[comp.sys.amiga.tech] Parallel port and interrupt servers

aduncan@rhea.trl.oz.au (Allan Duncan) (09/25/90)

Expert assistance is being sought!

I am currently (unsuccessfully) trying to write an interrupt server to
run with the parallel port.  Unfortunately the standard sources of docos
(RKM, Amiga Mail, Devcon notes) do not address this particular problem,
which is similar but not quite the same - and the differences count!

So far, I have found out that on the installing side of things you have to -

OpenResource ( "ciaa.resource" )  [ciaa is not mentioned in the RKM,
only cia, but I guessed] to get a pointer for the AbleICR and SetICR
functions which I _suspect_ you need to look at the interrupts to find
out if it is yours, rather than going to the ICR register directly,
which will clear it and prevent other servers in the same chain getting
screwed.  I'm a little puzzled by this, as the RKM says that doing the
OpenResource passes ownership of the CIA to you, but all I want to do is
use a part of it - the keyboard uses another of the bits that gives rise
to an interrupt on the same bit of the interrupt controller, so I really
need to _share_ use.  This point is a little more than academic, as you
will see.

OpenResource( "misc.resource" ) to get control of the CIA parallel port
(sounds fair enough) via AllocMiscResource() for the port and bits.

Optionally get a signal bit (for the moment I'm just writing the
incoming byte in a global variable and polling it for change of value).

Set the DDR for some bits out, some in (I want asynchronous full duplex
I/O).

Set up an Interrupt node structure, and AddIntServer().

	So far, so good!

AbleICR() the CIA Flag signal interrupt line ( Ack* to the parallel port)
so that I will get the interrupts.

After this, I _intended_ to just look at the spot where the interrupt
routine puts the new value, waiting for it to change.


Well.  I have tried this without the AbleICR, looking directly at the
CIA port, and my hardware talks to it correctly, but if I enable the
flag interrupt, the next keystroke will cause a guru (usually an address
error - hmm).

One thing I _love_ about interrupt routines - they are all dead
reckoning unless you have some high power hardware!

Here is the interrupt code ( I am using Manx, and don't think there are
any A4 offsets left in it)
---------------------------------------------------------------


* Entered with:
*  D0 == scratch
*  D1 == scratch
*  A0 == scratch
*  A1 == is_Data which is OURDATA structure (scratch)
*  A5 == vector to our code (scratch)
*  A6 == scratch
*

_ciaa	EQU	$bfe001
SetICR	EQU	-24

	XDEF	_CIAaResourceBase

_PARServer:				; entry to our interrupt Server
	movea.l	_CIAaResourceBase,a6
	move	#CIAICRF_FLG,d0
	jsr	SetICR(a6)
	andi.b	#CIAICRF_FLG,d0
	beq.s	not_ours
	lea	_ciaa,a0
	move.b	ciaprb(a0),d1		; new byte
	move.b	d1,od_lastin(a0)
	moveq	#1,d0
	RTS

not_ours:
	moveq	#0,d0			;pass on to next Server in chain
        RTS				;return to exec

--------------------------------------------------------
Allan Duncan	ACSnet	a.duncan@trl.oz
(03) 541 6708	ARPA	a.duncan%trl.oz.au@uunet.uu.net
		UUCP	{uunet,hplabs,ukc}!munnari!trl.oz!a.duncan
Telecom Research Labs, PO Box 249, Clayton, Victoria, 3168, Australia.

aduncan@rhea.trl.oz.au (Allan Duncan) (09/26/90)

A couple of minor corrections to my post:

I left off the structure in the assembler code
	STRUCTURE	OURDATA,0
	APTR	od_maintask
	ULONG	od_portsig
	UBYTE	od_lastin
	LABEL	OURDATA_SIZEOF

which will explain where od_lastin came from,

	move.b	d1,od_lastin(a0) should be (a1)

and the gurus are illegal instruction somewhere that my code isn't, not
illegal address.

Further question - I would like to keep small-code small-date, can I
force the Manx 3.6 compiler to keep just the references that affect the
server absolute, rather than a4 relative?
Allan Duncan	ACSnet	a.duncan@trl.oz
(03) 541 6708	ARPA	a.duncan%trl.oz.au@uunet.uu.net
		UUCP	{uunet,hplabs,ukc}!munnari!trl.oz!a.duncan
Telecom Research Labs, PO Box 249, Clayton, Victoria, 3168, Australia.

rhialto@cs.kun.nl (Olaf Seibert) (09/26/90)

In article <2275@trlluna.trl.oz> aduncan@rhea.trl.oz.au (Allan Duncan) writes:
[...]
>Here is the interrupt code ( I am using Manx, and don't think there are
>any A4 offsets left in it)
[...]

To check this is really the case, let the assembler make a listing.
(Option -l or somesuch). If there occur any xxxx's in unexpected
places, the assembler still generates A4 references.

>Allan Duncan	ACSnet	a.duncan@trl.oz

--
Olaf 'Rhialto' Seibert                               rhialto@cs.kun.nl
How can you be so stupid if you're identical to me? -Robert Silverberg
--
Olaf 'Rhialto' Seibert                               rhialto@cs.kun.nl
How can you be so stupid if you're identical to me? -Robert Silverberg

valentin@cbmvax.commodore.com (Valentin Pepelea) (10/05/90)

In article <2275@trlluna.trl.oz> aduncan@rhea.trl.oz.au (Allan Duncan) writes:
>
> Expert assistance is being sought!

Well, I rewrote the parallel.device for 2.0, so I guess I qualify. I hope
you're catching this message, despite the late response. If you do, please
mail me, telling me you have received this message.

> I am currently (unsuccessfully) trying to write an interrupt server to
> run with the parallel port.
> ...
> So far, I have found out that on the installing side of things you have to -
>
> OpenResource ( "ciaa.resource" )  [ciaa is not mentioned in the RKM,
> ...
> OpenResource( "misc.resource" ) to get control of the CIA parallel port
> (sounds fair enough) via AllocMiscResource() for the port and bits.
> ...
> Set the DDR for some bits out, some in (I want asynchronous full duplex I/O).
> ..
> Set up an Interrupt node structure, and AddIntServer().
>
>	So far, so good!

Not exactly. You are creating an ICR interrupt server, not a general interrupt
server. Therefore you should use AddICRVector(), not AddIntServer(). Here's
the initialisation steps that I use in the parallel device:

	Intr = NULL;
	ControlInput();
	DataInput();

	Cia = (APTR) OpenResource("ciaa.resource");
	if (Cia == NULL) return(IOERR_OPENFAIL);

	Intr = (struct Interrupt *) MakeInterrupt("parallel.device",
		0,&AckServer);

	/* Written in Assembler */
	if (ResourceOK = (APTR)ObtainParallelResource())
	{
	    return(IOERR_OPENFAIL);
	}

	Disable();
	ClearACK();

	if (AddICRVector(Cia,CIAICRB_FLG,Intr))
	{
	    Enable();
	    return(IOERR_OPENFAIL);
	}

	/* Don't allow any *ACK processing until a CMD_READ or CMD_WRITE */
	DisableACK();	
	Enable();


>_PARServer:				; entry to our interrupt Server
> ...
>	andi.b	#CIAICRF_FLG,d0
>	beq.s	not_ours
> ...
>	moveq	#1,d0
>	RTS
>
>not_ours:
>	moveq	#0,d0			;pass on to next Server in chain
>        RTS				;return to exec

ICR interrupt servers do not need to return a special value in d0. Another
thing I have to remind you, the parallel port is not bidirectional, i.e.
you cannot read and write data at the same time using the regular centronics
handshaking. When you read the parallel port bits, you create a *DS pulse
just like when you write to those bits.

Valentin
-- 
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