wall@fortune.UUCP (05/24/83)
Now I know that hardware types like myself are to be ignored, but their is an interesting quirk with the Z80 serial chips (and presumedly with the second source of these, like Mostek and SGS). It turns out that the (supposedly asynchronous) input control lines such as CTS, DCD, and RI are not totally asynchronous. We found that when we tied one of the outputs to two or more of the inputs (for external loop-back testing) the input change register would not reflect the fact that more than one input changed. Depending on the chip, it either got the DCD change, or the RI change, but not both. So beware that if the inputs both change at exactly the same time, the internal registers may not tell you.... Now if you want to know what happens when to play with the system clock going into a CTC....... !fortune!wall