[net.micro] 11 process address space query

DRF@Su-Ai@sri-unix (12/12/82)

From:  David Fuchs <DRF@Su-Ai>

There has been a bit of talk about the various flavors of -11's in DEC
personal computers.  The main reason I've been staying away from 11
architecture is that the last time I looked at it, the address space
reachable from a single process was 64K (bytes?).  Can anyone speak
authoritatively as to whether or not this is still true with the
new 11-on-a-chip?  In particular, I have a Pascal program that says:
	FOO: ARRAY [0..70000] OF 32-BIT-INTEGER-TYPE;
Will the new DEC machines handle this?  The salespeople sure don't know.
	Thanks,
	-david

leichter (12/13/82)

Re:  Can any of the new 11 chips deal with a per-process space of more than
64K?

In a direct sense, the answer is no.  The addresses in the instructions, and
all the registers you use to form addresses, are only 16 bits wide.  You
just cannot form a bigger address.  However, there are a number of ways
around this that have been implemented; all of them appear in the J-11,
for example.

1.  Memory mapping.  This is very old, in the 11 line.  The memory uses
18 or 22 bit addresses, generated by mapping your 16 bit address.  You
can only address 64k at a time, but you can re-map any time you like.
In RT11 FORTRAN, you can actually use arrays in "extended memory" which
are re-mapped for you invisibly.  Unfortunately, changing the map is
relatively slow.  (The IBM 360/370 architecuture limits direct addresses
to 4K, but the "mapping" (at one level) is through your 32-bit registers;
so you can change the mapping really quickly any time you like.)

2.  I/D space.  Instruction and data addresses use separate maps, so they
get 64K each, total 128K.  Heavily used by Unix; only recently used by
DEC OS's (RSX 11M+).

3.  Multiple modes.  There are always at least two modes (USER, KERNEL);
many machines (J-11, but not F-11) also have SUPERVISOR.  Each mode has
its own mapping tables.  By switching modes, you can get extra memory.
This has only recently gotten used much; in RSX11M+, you can make
"Supervisor Mode Libraries", that execute in supervisor mode, with
their own private I space, and their D space overmapping the user-mode
D space (so they can access the caller's data).

In summary:  16 bits is 16 bits, and is a limitation; but by clever use
of some of the escape mechanisms (hacks?) in the architecture, you can
do a lot better than you might think.  This is especially true if the
clever use is built into your compiler.
						-- Jerry
					decvax!yale-comix!leichter
						leichter@yale

smith@umn-cs.UUCP (06/06/83)

#R:sri-arpa:-7700:umn-cs:6900004:000:365
umn-cs!smith    Dec 14 15:19:00 1982

  No way.  The PDP-11 architecture is tied to a 16 bit address space
the way the IBM 360 (and its children) are tied to a 24 bit address
space.  They came up with the Vax in the first place because they
couldn't come up with a clean way to extend the 11's address space.
So instead of trying to bull it through like IBM, they just built
a new architecture.

Rick.