rudy@megalon.UUCP (Rudy Rucker) (03/01/90)
Chip designers do wire crossing by using two different planes of wires, with "solder spots" to poke through and let current move from one plane to the other here and there. It seems to me the most natural way to accomplish this in a CA is to have four bits per site, two bits to say whether the cell holds insulation, wire, electron head wire, or electron tail wire, one bit to say whether the cell is in plane 0 or in plane 1, and one bit so say if there is a solder spot. A better way to use the latter two bits, I guess, is to have them say whether the cell is in plane 0, plane 1, or in both planes (solder spot). Now we write an inner loop routine that at each cycle returns eight bits that come in two four bit chunk. One chunk gives me the firing eight sum in plane 0 (the nubmer of plane 0 cells which are on) and the other chunk gives me the firing eightsum in plane 1 (the number of plane 1 neighbor cells that are on). These numbers range from 0 to 8, so four bits are required for each. The cell's new state is based on the eight bits of plane0/plane1 firing eightsum info AND on the cell's present state (insulator, dead wire, head wire, tail wire, plane 0, plane1 or both). So each cell's new state is based on a total of 12 bits of info, so a wireworld rule or any variation on it can be specified by a 4K lookup table. If anyone wants to see the CA Lab owncode rule for doing this, I can write it up easily enough sometime in the next couple of weeks. There is nothing sacred about limiting oneself to Silverman's firing eightsum two bits per cell paradigm which, although fruitful, should not be engraved in stone. On a different topic, have you all seen Buckingham's new period 26 Life oscillator? Gosper sent me a copy which I can upload if anyone wants it.