hiebeler@TURING.CS.RPI.EDU (Dave Hiebeler) (03/02/90)
Well, there seems to be a fair amount of enthusiasm about Wireworld here lately.. so last night, I took a couple of minutes to implement Wireworld on the CAM and in Cellsim. I'll post them both in the next message. I haven't played with Wireworld much myself, and don't really have time to at the moment. However, I am reminded of some stuff I did about two years ago. I implemented a mostly CA-based package which did simple logic-circuit simulations. It used 8 bits/cell, to represent wires (straight, corner, crossover, and fan-out), AND, OR, NOT, Input, and Output. It could could do regular simulations, where you put signals on the inputs and run until signals reached the outputs. You could also mark a certain cell with a "fault", and it would propagate the fault and see which outputs would be affected, and which inputs would have been faulty to cause such a fault in the outputs. Basically you could do forward and backward fault-tracing, I guess it's called. (This was really similar to the normal simulation; under some conditions, the logic gates could "erase" the fault. For example, for an AND gate, if one input was 0 and the other was a fault, the output would be a 0 with no fault; if one input was 1 and the other was a, fault the output would also be faulty.) The real reason for writing all that though, was because we were experimenting with "circuit shrinking" algorithms -- routines which would compress the image spatially, without changing the connectivity of the circuit. (Timing was not a consideration; logic-gates behaved more like dataflow I guess, in that they would wait for all inputs to come in before sending an output. I don't know much about that area though, so I'm not really qualified to say). I came up with 6 or 7 algorithms for shrinking these things, which ran in parallel on our Sequence Balance 21000. Some were CA-based, a few were more general parallel algorithms. You controlled all this from a SunView program, which would communicate with the Sequent (somewhat like the way Cellsim2.5 talks to Connection Machines now). I think I wrote a few lines about each step of the shrinking algorithm somewhere. If someone's really interested in this, I might be able to dig it up. The code is still lying around too, if someone has a Sun and Sequent Balance. There are a couple of bugs in it -- I tested it a few weeks ago to see if it still worked, and I noticed it didn't shrink one circuit quite as much as it could have -- but most of it is OK. Well, sorry about that little trip down memory lane; I thought perhaps some of the Wireworld enthusiasts would be interested. Dave Hiebeler hiebeler@turing.cs.rpi.edu Computer Science Dept hiebeler@heretic.lanl.gov Amos Eaton Bldg. hiebeler@rpitsmts.bitnet Rensselaer Polytechnic Institute Troy, NY 12180-3590