U23379@UICVM.BITNET (Henry Young 312-413-3626) (07/12/89)
Sorry, I discovered the source of the problem. When issuing an SVC 202
with a address specified for error handling i.e. DC AL4(CMDERR)
the address does not get changed to reflect the new location in the
nucleus since there is no way to include the base register for addressing.
I guess I will just have to check R15 directly. After all the 'PER'ing
today, I might as well become a cat. ;)
Thanks.
- Henry -CHARLES@ETSUACAD.BITNET ("Charles Becker 886-5425", 214) (07/12/89)
Henry: In regard to your DC AL4(CMDERR) problem, you can avoid having to make your planned modifications if you use the RLDSAVE option of the LOAD command. This will save the relocation information from the assembled text deck. Good luck! Charles Becker VM Systems Programmer East Texas State University CHARLES@ETSUACAD.BITNET
wagner@pucc.Princeton.EDU (John Wagner) (07/12/89)
In article <8907112107.AA23647@jade.berkeley.edu>, U23379@UICVM.BITNET (Henry Young 312-413-3626) writes:> > Sorry, I discovered the source of the problem. When issuing an SVC 202 > with a address specified for error handling i.e. DC AL4(CMDERR) > the address does not get changed to reflect the new location in the > nucleus since there is no way to include the base register for addressing. > I guess I will just have to check R15 directly. After all the 'PER'ing > today, I might as well become a cat. ;) To avoid this problem always code the error address ad DC AL4(1). This will cause CMS to always continue at the instruction following the error address. The code sequence would look like this: SVC 202 Doing whatever you were doing DC AL4(1) Always return (even on failure) LTR R15,R15 Did it work? BNZ FAILURE ---> Nope ...
wagner@pucc.Princeton.EDU (John Wagner) (07/12/89)
In article <8907112107.AA23647@jade.berkeley.edu>, U23379@UICVM.BITNET (Henry Young 312-413-3626) writes:> > Sorry, I discovered the source of the problem. When issuing an SVC 202 > with a address specified for error handling i.e. DC AL4(CMDERR) > the address does not get changed to reflect the new location in the > nucleus since there is no way to include the base register for addressing. > I guess I will just have to check R15 directly. After all the 'PER'ing > today, I might as well become a cat. ;) To avoid this problem always code the error address ad DC AL4(1). This will cause CMS to always continue at the instruction following the error address. The code sequence would look like this: SVC 202 Doing whatever you were doing DC AL4(1) Always return (even on failure) LTR R15,R15 Did it work? BNZ FAILURE ---> Nope ...