dollas@uiuccsb.UUCP (04/15/84)
#N:uiuccsb:4400057:000:1150
uiuccsb!dollas Apr 15 15:28:00 1984
My response to the 'Large Dual Ported Memories' inquiry that was posted some
time ago stirred many interesting discussions and counterpoints. As it turns
out, a lot depends on what one means by 'dual ported' memory. One of the
responses referred to a FIFO chip. Well, time came and a FIFO chip is
exactly what I need. Please respond to me with electronic mail, and if there
is a sufficient interest I will post the answers. What I need is:
A FIFO chip that has:
* reasonably high capacity (say, >2K), and reasonable speed (say, < 500ns).
* dedicated input and output (ie no pin MUXing for R/W).
* potential for parallel connection of many chips to achieve higher width (or
word width of 12bits or higher).
* single power supply and TTL compatible voltages (optional)
In my application the information flow will be continous, so I can live with
a chip that needs a clock pulse every so often (eg one that is implemented with
transmission gates).
Thanks in advance (as they say)...
Apostolos Dollas
Dept. of Computer Science
Univ. of Illinois
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