sct@lanl-a.UUCP (04/30/84)
Did you implement a gate level design of a D flip flop? Also, is there a lot of interest out there in digital design in general and programmable logic arrrays in particular? Has anyone had problems with PALASM? We have! I have yet to see test vectors loaded into a programmer and actually work. What is the opinion of other designers on some of the ECADD systems currently being produced for the IBM-PC. We've been evaluating P-CAD from a company in California and it looks promising.
witters@fluke.UUCP (05/03/84)
Yeah, I'm interested in programmable logic in general. Should we start a new newsgroup? John Witters John Fluke Mfg. Co. Inc. P.O.B. C9090 M/S 243F Everett, Washington 98206 (206) 356-5274 fluke!witters
phil@amd70.UUCP (Phil Ngai) (05/04/84)
Something I've always sort of wanted was a way to implement a edge triggered
flip flop using a PAL16L8 type of device. Since the 16L8 only has an AND-OR
structure in it (no clocked FF like the 16R8) this seems to many people to
be impossible to implement.
Well, I just did it, I think. I am wondering if this is new and novel enough
that people are interested in hearing about it, or if it is just old hat
to experienced circuit designers. (how about PAL hackers?)
Why would you want to do this? If the choice is to use an external FF and you
have to operate on the signal before putting it into the FF, you don't have
to spend the two pins getting out of your PAL and into the FF. You also save
all the extra pins on the FF that you never need like Q* or even worse,
RESET and SET which you have to pull up. (plus you don't need to stock
external FFs or read data sheets :-) [anyone ever get the pinout on a 7474
wrong?]) If the choice is to use a 16R8, sometimes you want several
different clocks, while the 16R8 restricts you to one clock per package.
BURN MORE PALS!
--
Phil Ngai (408) 988-7777 {ucbvax,decwrl,ihnp4,allegra,intelca}!amd70!philpauls@tekecs.UUCP (05/05/84)
There are lots of us interested in programmable logic. However, the way to start a new newsgroup is to discuss the subject in net.micro until those not interested suggest that we form our own news group. In my design group we have implemented asynchronous sequential circuits using PAL16L8's and PAL20L8's. I suspect that most of the circuits that have traditionally used clocked flip-flops could be put into PAL's that use internal feedback to form R-S latches. It has worked fine for us but I have not found others that use non-registered PAL's this way. Paul Sweazey tektronix!tekecs!pauls