gnu@sun.uucp (John Gilmore) (05/08/84)
Your suggestion appeared in the April 1, 1981 issue of EDN magazine, starting on page 179. They took a set of benchmarks produced at CMU in 1977, took out a lot of stuff that didn't work on all the processors (eg, virtual memory tests, floating point tests), and benchmarked with the remaining 7 tests. Each benchmark was hand coded in assembler by the company that produced the chip. Then all the code was circulated among all the companies to make sure nobody was breaking the rules. Then they timed and published the results. The four micros were the LSI-11/23, 8086, 68000 and Z8000. They ran them all at the fastest available speed (10MHz 8086 and 68000, 6MHz Z8000) and with no wait states, except the LSI-11/23 which had offboard memory. All assembler source code, Pascal pseudo-code descriptions, and flowcharts are included in the article. It would be nice if they updated this for the 186 and 286, 68010, 68020, 16016 and 16032, etc. Maybe next month they will... PS: If you read the 68000 code carefully, there are several places where they used "short absolute" addresses (eg, the queue entries in Benchmark B) where the comments claim that the full 16MB address space can be used. I'm real surprised nobody at Intel caught them at this; perhaps management did not let them read 68000 assembler for fear they would quit.