David.Anderson@CMU-CS-G.ARPA (08/01/84)
The Macintosh designers decided that parity wasn't worth it, because of the board space it would consume, and it would be just another thing to go wrong. Maybe someone else knows how carefully they measured the tradeoffs. --david
phil@amd.UUCP (Phil Ngai) (08/02/84)
There are two arguments here:
1) Parity decreases your MTBF and increases your cost. It decreases
your MTBF because it adds more parts which can break. (please, no
flames yet) It increases your cost by more than just a couple of DRAM
chips. You also need 2 parity generators, the logic which detects
a parity fault at an appropriate time for sampling and can remember
the fault until told to forget, a free interrupt line, and logic
to force a parity error so you can verify the parity detectors work.
This is typically about 8 chips worth. I should know, I designed
parity into my last product. At the time I did not feel it was worth
it but the customer demanded it.
2) What if you get a soft error in your RAM and your data is corrupted.
How much is that worth? Although parity decreases the MTBF it increases
your confidence factor. One can argue that soft errors only happen
a few times a year but in many applications that is a big problem.
I find all this very interesting because I am at a stage where I can
implement or not implement parity in my current project. I haven't
decided yet.
--
I'm going to keep boring until I strike oil.
Phil Ngai (408) 982-6554
UUCPnet: {ucbvax,decwrl,ihnp4,allegra,intelca}!amd!phil
ARPAnet: amd!phil@decwrl.ARPAjones@fortune.UUCP (08/03/84)
#R:sri-arpa:-58600:fortune:28000047:000:1324
fortune!jones Aug 2 18:03:00 1984
The question of Parity or Error Detection and Correction (EDC) for
memory utimately boils down to the market for your machine. If it
is intended for business applications or runs multiusers, I believe
it should have EDC. My opinion is aligned with the vanishing
minority and is not marketable unless you are talking about Minis
or larger. The serious user who values his data should at least
have parity. I liken it to the power outage light on some freezers.
It's a bother and may not work but, if it does, it could save you
a barrel of money...or at least a small pocketbook.
For the average personal computer user (careful, Jones, move your
thumb away from that lighter) it's caveat emptor. Hey, you know,
like errors are very rare and, like, the memory is probably not
full anyway, and, like, if it was serious the system would probably
crash, so like, you'd know, right? Confidence counts for a lot,
with me anyway. I still remember the first TRS-80 manual I saw
which, to my wondering eyes, stated that the only way a user could
be *confident* that his program loaded correctly off of tape was to
load again and compare loads...Thanks awfully.
Dan Jones
UUCP: {ihnp4,ucbvax!amd,hpda,sri-unix,harpo}!fortune!jones
DDD: (415)594-2440
USPS: Fortune Systems Corp, 101 Twin Dolphin Drive, Redwood City, CA 94065BILLW@SRI-KL.ARPA (08/04/84)
Although parity increases your confidence that data in memory is valid, it isnt clear to me (from a software point of veiw) that this necessarrilly does the user any good. In a critical application, it could be a very bad thing for a word of memory to suddenly go bad, but it could be worse for the system to crash with a "parity error" message, and lose ALL your data. Most software is not equiped to handle parity errors in any reasonable manner. Parity errors are pretty rare anyway. How many people have actually sen a parity error on their IBMPCs? I get the impression that with the fancy ECC chips on the market these days, it is easier to implement ECC than parity (although more expensive, of course). Is this impression correct? BillW
cdh@BBNCCX.ARPA (08/04/84)
From: "Carl D. Howe" <cdh@BBNCCX.ARPA> Concerning ECC: be careful. Some of the fancy VLSI ECC chips have such large die sizes and have been pushed to be so fast, that THEIR soft failure rate is higher than the RAMs they protect!! ECC also costs a lot more. On the other hand, it does allow you to continue running with completely nonfunctional chips, a feature if you are looking at a nonstop type of application. I guess my point is that all types of error detection/correction techniques have their places. The hard part is choosing the right point in the design space to run your application. Doing some rudimentary failure calculations at least gives you a point where you can start making tradeoffs and know whether you are winning or losing. Carl
brownell@harvard.ARPA (Dave Brownell) (08/06/84)
Two points:
1) Designs that only have hardware error detection (parity, ECC,
or what-have-you) are SERIOUS COPOUTS. Get that lazy programmer
to write some code that invalidates that block of RAM, logs
the error, kills the process using it, and then lets the
rest of the system continue!!!
2) Apparently not many here are aware, but there are a large number
of market projections that say that "fault tolerant" systems
are the hottest growth area ($$$) in computers over the next
decade. NOT second to micros, note. There are a lot of people
with lots of money out there who want their computers to be
reliable. I wouldn't mind a single bit error adding $100K to
my bank account, but the bank sure would.
In short, YES, parity is worth it. But only as part of a whole system
design, cut these half-a**ed efforts before I get violent. You have to
be able to recover from the errors, not just detect them.
Dave Brownell
Sequoia Systems Inc.
{allegra,floyd,ihnp4,seismo}!harvard!sequoia!brownellseifert@ihuxl.UUCP (D.A. Seifert) (08/07/84)
On a mini-based ATE system which I won't embarrass by giving
the name of here, parity was quite handy. Not for the RAM, mind you,
for the hard disks. Anytime I saw a parity error from a disk I
jumped on the phone to maintainance and suggested that they clean
the heads before we had a crash. Parity made a nice early
warning system. Would have been nice if they had had some decent
software. And some decent hardware. Maybe someday I'll manage to forget.
--
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