[comp.sys.sgi] Personal Iris I/O driver for Excelan EXOS-302 board

grahamd@LL.MIT.EDU (dick graham) (01/19/91)

Hello:

I'm trying to write an I/O driver to communicate with an Excelan
EXOS-302 board plugged into the VME slot of a Personal Iris 
(configuration 4D/20).

The host computer (the PI in this case) is supposed to be able to
communicate with the exos board via three ports in memory-mapped
I/O space and through system memory.  The host computer uses the
ports to:

        *  determine board status by polling specific bits in the
           port.
        *  reset the board by writing to a specific port.
        *  send an address in system memory where the board can
           find an initialization message.

System memory is used to pass commands and data between the board
and the host.  The board acts as a bus master to transfer data
between its memory and the system memory over the host bus.

The board has an LED on it that is used to indicate board status 
and any exceptions detected by its on board software.

The board is jumpered for the following configuration:

        *  A24 VME bus master and A24 bus slave.
        *  Bus priority request level 3
        *  interrupt 5
        *  slave port kernel address (i.e. probe address):
                0xBEC00000

The PI I/O driver does the following:

        * verifies the existence of the board using the 'badaddr'
          function at the edtinit entry point.
        * resets the board by writing to the reset port.
        * verifies that the reset takes place by polling a bit
          in the status port until it changes state.
        * builds an initialization message in a kernel buffer
          in the driver.  
        * sends the starting address of the initialization msg
          to the board.  This address is sent by writing 8 bytes
          to the address port.  Before each byte is written a 
          bit in the status port is checked to see if the address
          port is ready.  

Everything works as expected until the address of the initialization
message is sent.  It appears the address bytes are sent OK because
the ready/not ready status bit for the address port changes state
at the appropriate times.  The system memory address sent to the
board is:

        FF FF 00 00 C0 7D 0E 39

where FF FF 00 00 is a prefix required by the board.  C0 is the
least sig. byte of the init. msg address, 0E is the most sig. byte.,
and 39 is the VME modifier.  The address of the initialization
message in the driver is 0x800E7DC0.  The physical address of
0xE7DC0 is obtained by calling function kvtophys.  This 
initialization buffer is 100 bytes long.

The initialization message contains a status byte that the host 
monitors after it sends the address to the board.  When
the value of this byte changes then the host knows the board has
been initialized.  The value of this byte never changes.  Also
the LED on the board indicates the board has detected a system
bus error.  According to the board's manual this error can be
caused by an incorrect hardware configuration, a system memory
error, or an incorrect memory address. 

Function vflush has been used in the driver with no change in
the results.


Questions:

Can the PI pass the address of its system memory to a VME 
board and then expect the VME board to be able to access that 
memory for the purposes of passing commands and data?

Is the driver sending an address that the board should be able to
access or is there another address that should be used?  I've 
tried sending address values from throughout the 8mb range but 
they all yield the same results.  (There wasn't a valid init. msg
at these addresses.  I just wanted to see what the board would
do.)  The board can also be jumpered as an A32 master, A32 slave.

If 0xE7DC0 is a valid address with a valid init. msg, is there
something else the driver has to do to make this address available
to the board?  Or is there something the driver has to do to
see what the board writes to this address?

Are there any hardware mods or jumper mods required in the PI to
install a VME board?

The SGI manual "Guide to Writing Device Drivers for the SG 
IRIS-4d Computer Systems" dated Dec. 13, 1988 is being used for 
developing this driver.  Is ther a newer version of this that 
contains information that may help?

Any ideas or suggestions will be greatly appreciated.  Thanks in
advance.


 .... sent by: Dick Graham                    | grahamd@ll.mit.edu
               Lincoln Laboratory, Group 91                             
               (617) 981-5686