hull@hao.UUCP (Howard Hull) (12/20/84)
> > The main problem with 64 bit micros is the pin count on the chip > (I am new to this discussion, so please ignore if this stuff has been > pointed out before). 32 address lines and 64 data lines already make > 96 pins on the chip! Multiplexing these lines only defeats the purpose > behind going to 64 bits to begin with. I'm not saying that there will > be no 64 bit micros, but they are likely to be bit-sliced machines. No need to worry if chip manufacturers will be concerned over the pin count. The Motorola 68020 has 114 pins! > > The greatest derangement of the mind is to believe in something > because one wishes it to be so - Louis Pasteur > > James Giles It looks like this: N * * * * * * * * * * * * * M * * * * * * * * * * * * * L * * * * * * * * * * * * * K * * * * * J * * * * * H * * * * * G * * * * * * F * * * * * E * * * * * D * * * * * C * * * * * * * * * * * * * B * * * * * * * * * * * * * A * * * * * * * * * * * * * 1 1 1 1 1 2 3 4 5 6 7 8 9 0 1 2 3 Pin# Function Pin# Function Pin# Function A1 BGACK~ D1 Vcc K1 GND A2 A1 D2 Vcc K2 HALT~ A3 A31 D3 N.C. K3 N.C. A4 A28 D4-D11 - K4-K11 - A5 A26 D12 A4 K12 D1 A6 A23 D13 A3 K13 D0 A7 A22 L1 AS~ A8 A19 L2 R/W~ A9 Vcc E1 FC0 L3 D30 A10 GND E2 RMC~ L4 D27 A11 A14 E3 Vcc L5 D23 A12 A11 E4-E11 - L6 D19 A13 A8 E12 A2 L7 GND E13 OCS~ L8 D15 L9 D11 L10 D7 B1 N.C. F1 SIZ0 L11 N.C. B2 BG~ F2 FC2 L12 D3 B3 BR~ F3 FC1 L13 D2 B4 A30 F4-F11 - B5 A27 F12 N.C. M1 DS~ B6 A24 F13 IPEND~ M2 D29 B7 A20 M3 D26 B8 A18 M4 D24 B9 GND G1 ECS~ M5 D21 B10 A15 G2 SIZ1 M6 D18 B11 A13 G3 DBEN~ M7 D16 B12 A10 G4-G10 - M8 Vcc B13 A6 G11 Vcc M9 D13 G12 GND M10 D10 G13 Vcc M11 D6 M12 D5 C1 RESET~ M13 D4 C2 CLOCK H1 CDIS~ C3 N.C. H2 AVEC~ N1 D31 C4 A0 H3 DSACK0~ N2 D28 C5 A29 H4-H11 - N3 D25 C6 A25 H12 IPL2 N4 D22 C7 A21 H13 GND N5 D20 C8 A17 N6 D17 C9 A16 N7 GND C10 A12 J1 DSACK1~ N8 Vcc C11 A9 J2 BERR~ N9 D14 C12 A7 J3 GND N10 D12 C13 A5 J4-11 - N11 D9 J12 IPL0~ N12 D8 J13 IPL1~ N13 N.C. The Vcc and GND pins are separated into three groups to provide individual power supply connections for the address bus buffers, data buffers, and all other output buffers and internal logic. Group Vcc GND Address Bus A9 A10,B9 Data Bus M8,N8 L7,N7 Logic D1,D2,E3,G11,G13 G12,H13,J3,K1 Disclaimer: While copied with great care from Motorola publication BR-243, "MC68020 Technical Summary" the Data provided are for a virtual device for which Motorola states "Specifications and information herein are subject to change without notice." Any smoke obtained from a real device by using this preliminary pinout is the responsibility of the user and not the submitter of this net article or his employer. Howard Hull {ucbvax!hplabs | allegra!nbires | harpo!seismo } !hao!hull