phil@amdcad.AMD.COM (Phil Ngai) (05/10/88)
I was looking at the WD Ethernet literature and they make a big deal
out of NOT having DMA. They claim dual ported memory makes system
configuration easier (there are only a few DMA channels and allocating
them is hard), and that the strings instructions on ATs is faster
anyway. They point out the 286 on an AT beats the 186 in Excelan etc
style boards.
Any comments on this?
I was quoted a price of $207...
--
Make Japan the 51st state!
I speak for myself, not the company.
Phil Ngai, {ucbvax,decwrl,allegra}!amdcad!phil or phil@amd.comROMKEY@XX.LCS.MIT.EDU (John Romkey) (05/10/88)
Western Digital's claims, re: speed on an AT and ease of configuration, are basically correct. The AT's DMA controller runs slower than the PC's, because (I think) it loses some cycles since you've got a second controller cascaded with it. The 286 string instructions are a lot faster. Plus, since it's memory mapped, they're not JUST 286 string instructions; the whole 80x86 line has them. On the other hand, it's also difficult to deal with mapping in memory when you've got who knows what random EMS memory and EGA's and BIOS extensions and whatever floating around in your physical address space. - john -------
jas@proteon.COM ("John A. Shriver") (05/10/88)
Yes, AT DMA is slow as a dog. The glue logic between the 8237 DMAC, which is an 8 bit device, and the 16-bit bus, is a very slow kludge. 16-bit DMA using the second DMAC is somewhat better, and boards that take over the bus and do their own DMA are much better. However, doing either of these limits your board to use in AT's, which dealers don't like. What is nice is that an AT can move memory from one place to anther incredibly fast using string moves. (These are 286-only instructions). It blows away most DMA implmentations (no arbitration delays). Since the CPU is essentially halted during DMA anyways, why not let it do the copy. The tradeoffs are probably different on the MicroChannel in PS/2's.
ddp+@ANDREW.CMU.EDU (Drew Daniel Perkins) (05/11/88)
Where did you get that price quote from? Name, address, etc? I'd like to get a couple of the boards. Drew
Philip Prindeville@UDEL.EDU, philipp@larry.mcrcim.mcgill.EDU (05/11/88)
Well, my experience on some of the memory mapped boards has been that it is indeed efficient. One of the very high performance serial boards (1.5mbps) that I am working with has 512K of memory, of which the top 256k is reachable (as 4x16kb windows). In the CMU PC/IP I keep the packet buffers there, and never have to do any copying. It is _very_ fast (almost 90% line utilization). I was working with a few ARCNET boards some months ago, and they were also memory mapped. It does make for faster copies (if they are 2 wait states or less) than DMA. Problem was that they could only hold 4 packets, so you had to build your packets and then copy them. Sigh. -Philip
dougm@ico.ISC.COM (Doug McCallum) (05/11/88)
In article <21523@amdcad.AMD.COM> phil@amdcad.AMD.COM (Phil Ngai) writes: > >I was looking at the WD Ethernet literature and they make a big deal >out of NOT having DMA. They claim dual ported memory makes system ... >I was quoted a price of $207... I've been using one for quite a while now and find it a nice, fast ethernet interface. The lack of DMA hasn't appeared to hurt performance any, but then a 386/AT is pretty fast at moving the bytes off of the board. The WD board is definitely one of the price/performance leaders in this class of board. Their ethernet board can frequently be found (as in the price you quoted) in the same range as a lot of slow interfaces or other vendor's Starlan versions of an ethernet board. WD also has Starlan for what its worth. There was some discussion some time back about the AT DMA controller being slower than the string move instructions of a 286. If that is the case, the WD's approach would be better. Several other AT ethernet controllers also use the shared memory approach (MICOM/Interlan NI5210 for one). Doug McCallum Interactive Systems Corp. dougm@ico.isc.com
jbvb@VAX.FTP.COM (James Van Bokkelen) (05/11/88)
In my experience, shared memory is a *lot* faster than DMA on an AT. The five fastest boards we support all use shared memory. Of course, Excelan uses shared memory, too, but the classic problem with outboard protocol implementations is that they are complicated to talk to. This is likely to eat up all the gains from using two processors, and then some. W-D does have a slight edge on some other cards, in that their shared memory address is set by software: only the interrupt vector and I/O address are set via jumpers. With PC/TCP, the WD8003 is right up there with Interlan's NI5210 and 3Com's 3C523 (Etherlink-MC) for speed. James VanBokkelen FTP Software Inc.
karl@trwind.ind.trw.COM (Karl Auerbach) (05/11/88)
One thing to watch out for with shared memory boards -- a number of AT clones do not honor the I/O CH RDY line on the bus. This signal is used by the memory to hold-off the processor for a little while. This is typically necessary when the on-board hardware is using its port into the shared memory. The consequence of not honoring I/O CH RDY is that the AT processor can pick up bad data because it fails to wait when told to do so. To build a shared memory board that does not have sensitivity to machines with this "feature" requires that the shared memory be essentially zero wait, which is increasingly difficult as machines get faster and faster and as LAN controller chips become more like I/O channels. Zero wait tends to imply that the raw memory speed is enough to satisfy both the LAN controller and the PC procesor simultaneously -- in other words we're talking about expensive, probably static, memory. ~I hope the folks who clone micro-channels do a better job than those who built clone AT buses. --karl--
ROMKEY@XX.LCS.MIT.EDU (John Romkey) (05/12/88)
The Western Digital board only has 8K of memory on it; I think it uses a single chip static RAM. I've heard from sources outside of WD, though, that it's 2 wait state memory. - john -------
karn@thumper.bellcore.com (Phil R. Karn) (05/12/88)
> I was looking at the WD Ethernet literature and they make a big deal > out of NOT having DMA... I agree. I haven't written a driver for the WD board, but I have for the 3C501, which provides a choice of using a "DMA" facility to load the buffer or an auto-incrementing window into the board's buffer memory that is accessed through an I/O port. On the 286, the INS/OUTS instructions really move data -- 4 clock cycles per byte (or word, depending on the instruction), after an initial startup of 5 clocks. Some boards simply can't keep up with this instruction on the faster ATs. Note that even if you use DMA, it's not inherently "faster" than direct I/O when dealing with very fast (bus speed) transfers. Even though the CPU is theoretically able to do other things while the DMA operation runs, it will be slowed by heavy bus contention. And just as it's getting ready to do something else, it'll get the DMA completion interrupt. So I've never seen any reason to bother with the 3C501's "DMA" feature. (Needless to say, it's also harder to use than the I/O copy). Even though the PC/XT lacks INS/OUTS, you can still move data pretty fast through an I/O port with an unwound assembler loop. Or you can replace your 8088 with a V20, which does have INS/OUTS. As far as I'm concerned, the PC might as well not even have DMA. It's a shame, because it would be very useful with medium speed transfers (e.g., with HDLC packet radio interfaces operating in the tens-of-kilobits range). These peripherals are too fast for one-byte-per-interrupt operation, but are not so fast that the processor can easily afford to busy wait with interrupts disabled (to prevent lost data) during each transfer. So once again people will have to circumvent the PC's failings with yet more hardware (buffering, etc) on specially-designed peripheral cards. Sigh. Phil
jbvb@VAX.FTP.COM (James Van Bokkelen) (05/12/88)
The WD8003 has a jumper on it which sets how many wait states the board generates. They recommend one setting for 6Mhz machines, another for anything faster. I have not yet encountered a clone that either the WD8003 or the NI5210 won't run in, although we do own a number on which the I/O CH RDY line doesn't behave as it does on IBM machines. James VanBokkelen FTP Software Inc.
RAF@NIHCU.BITNET (Roger Fajman) (05/15/88)
> Note that even if you use DMA, it's not inherently "faster" than direct > I/O when dealing with very fast (bus speed) transfers. Even though the > CPU is theoretically able to do other things while the DMA operation > runs, it will be slowed by heavy bus contention. And just as it's > getting ready to do something else, it'll get the DMA completion > interrupt. Is this true of machines like the Compaq 386/20?