bcase@amdcad.UUCP (Brian case) (06/19/85)
I read the following in the "WE 32100 Microprocessor Information Manual" section 3.6.6 Stack and Miscellaneous Instructions: If an instruction, other than a conditional transfer, reads the PSW, the assembler m32as inserts a NOP before that instruction. This allows time for the PSW codes to settle before the new instruction tries to access them. Ahem. Allows the codes to settle? Don't they need to settle before the conditional transfer can reliably take place? Oh well, not a very big bug because explicit access of the PSW should be rare in user code, but come on guys, be honest! It's a bug! :-) bcase Ok, now look. The views stated here are only those of a few brain cells that worked correctly yesterday but are probably dead by today anyway. They don't possibly represent the views of anyone I work for or ever worked for.
darrell@sdcsvax.UUCP (Darrell Long) (06/22/85)
I did some tests on the code generated by the 3B-2 C compiler, including some of the ``standard utilties'' and NOP's make up nearly 10% of the code. Agreed, this is a bug. As for the previously mentioned RESTORE instruction, it was privately confirmed that there is a problem with it when used in a virtual memory environment (which SYS VR2 is not). This is why it is mapped to a sequence of POPW's. -- Darrell Long Department of Electrical Engineering and Computer Science University of California, San Diego USENET: sdcsvax!darrell ARPA: darrell@sdcsvax