dlee@tut.UUCP (11/02/87)
Could someone point me to the literature from which I can learn more about the architecture of the multimax? I have the Multimax technical summary, but I need some more indepth info about its arch (e.g., the interconnection network, how applications can be benefit from its unique arch., any bottleneck problem between CPU and disk, CPU and memory, how they are resolved, etc.). I just started study tne multimax and trying to learning how to write applications that make ue of its multi CPU arch, so any information would be appreciated. - Dik Lee. -- Dept. Computer and Information Science dlee@tut.cis.ohio-state.edu The Ohio State University ..!cbosgd!tut.cis.ohio-state!dlee Columbus, OHIO 43210-1277 614-292-2568