PVR%bgerug51.earn@NSS.CS.UCL.AC.UK (Patrick Van Renterghem / Transputer Lab) (08/29/88)
BIRA (The Belgian Institute for Automatic Control)
Transputers for Industrial Applications
october 18, 1988
Switel Hotel, Antwerp, Belgium
Introduction and Objectives:
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The transputer is a single VLSI chip that combines processing power, memory and
communication links for direct connection to other transputers. The transputer
contains a fast integer and floating-point processor and can be used as a
building block for even faster parallel processing systems, ranging from
embedded control systems to supercomputers.
This seminar shows some of the industrial applications of transputer systems,
both in the high-quality presentations and in the accompanying exhibition.
Who should attend ?
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This seminar is invaluable for developers of high-speed or fault-tolerant
systems, programmers who want to exploit parallel processing techniques and
people who have applications that demand a very high performance, such as image
and signal processing, computer graphics, real-time simulation and animation,
number crunching, embedded controllers, adaptive filtering, pattern
recognition, robotics, telecommunications, databases, molecular modelling,
artificial intelligence and expert systems.
This seminar will benefit both project managers, developers and technically
aware management, as the presentations will be of a high-level and are given by
experts in their field.
Why should you attend ?
---------------------
There are not many microprocessors around, that can be used so easily to build
high-performance systems. It is impossible to ignore the transputer when
developing or using the fastest system for your application. This seminar is
almost unique in its sort, because it emphasizes on the industrial applications
of the transputer.
Together with this seminar, we organize a specialized exhibition in which
several manufacturers of hardware and software for the transputer demonstrate
their products and applications. With more than 15 companies represented, it
is one of the largest exhibitions of transputer technology there has ever been.
If you are interested in parallel processing in general, or the transputer in
particular, if you are interested to see what the transputer can do for your
application, or wish to know more about it, then you should attend this
seminar.
Prof. dr. ir. L. Boullart, ir. P. Van Renterghem,
Chairman BIRA-DTCS Seminar coordinator
Inmos and occam are trade marks of the INMOS Group of Companies.
Detailed Programme/Schedule:
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08u30 Registration and welcome
09u15 Transputer and Occam Tutorial,
dr. David May, Inmos Ltd., U.K.
VLSI technology allows a large number of identical devices to be
manufactured cheaply. For this reason, it is attractive to implement a
concurrent system using a number of identical components, each programmed
with the appropriate process. The transputer is such a device.
The transputer is a single VLSI device with memory, processor and
communication links for direct connection to other transputers. The
transputer architecture aims to maximize the performance obtained from a
given area of silicon, enabling multiple processor systems to be
constructed economically. The transputer can be used as a building block
for parallel processing systems ranging from embedded control systems to
supercomputers, with occam as the associated design formalism.
The occam language enables an application to be described as a collection
of processes which operate concurrently and communicate through channels.
In such a description, each occam process describes the behaviour of one
component of the implementation and each channel describes a connection
between components.
10u30 Coffee/Tea break + possibility to visit the exhibition
11u25 Transputers for Industrial Applications,
ir. Patrick Van Renterghem, Automatic Control Lab/The Transputer Lab,
State University of Ghent, Belgium
This presentation shows what can be done with transputers and what is the
best way to do it. A number of applications are examined in more detail,
such as the use of transputers for computer graphics, in laser printers,
pattern recognition, simulation, ... A number of advantages and
disadvantages of transputers are presented. There is also an overview of
hardware and software development systems for the transputer.
12u15 Aperitif + Lunch
14u00 A Transputer Sonogram Display System
Mr. Andrew Holman, Topexpress Ltd., U.K.
Transputers provide the opportunity to construct extremely low cost, high
performance and flexible signal processing systems. The presentation
will describe and demonstrate a PC-based sonogram display system.
Analogue signals generated by a microphone are digitised at 25 kHz and
output to a transputer via a link interface. A T414 transputer, which
inputs the digital signals, constructs data packets comprising 1024 time
point samples. The data packets are distributed to a number of T800
transputers where fast fourier transform (FFT), power spectrum and
display line generation calculations are performed. The resulting data
packets, containing the display lines, are sent to a T414 transputer with
a memory mapped screen. Here the display lines are read, time-ordered
and copied into the screen map.
The design and implementation of the software for this system will be
discussed in detail. Some features of the hardware used, in particular
the ADC, will also be discussed.
14u40 The Helios Operating System,
dr. Tim King, Perihelion Software Ltd., U.K.
Helios is the first operating system specifically designed for the
transputer to become widely available. It is a fully distributed,
multi-tasking operating system that supports multiple processors and
users. It provides an excellent programming environment, both for the
development of transputer software and for the delivery of transputer
applications to end users.
Features include a high level of Unix compatibility, good fault
tolerance, a capability based protection scheme for multiple users and
graphics support under the X-Windows V11 standard. Amongst the languages
supported are C, Fortran and Occam.
Helios is already being used for a wide variety of transputer-based
applications: for embedded systems, for PC and other plug-in boards, for
workstations and for transputer-based computer systems.
15u10 Coffee/Tea break + possibility to visit the exhibition
15u50 Fault-tolerant, Self-repairing Transputer Arrays,
dr. Richard Armstrong, Smith Associates Ltd., U.K.
The transputer and occam offer unique features that allow multi-
processor systems to be designed, implemented and programmed. It is
consequently feasible to design systems with very high throughput and/or
redundancy to achieve fault-tolerance.
Initial radiation tests of the transputer indicated that the total dose
failure level was sufficiently high for use in space but that Single
Event Upsets (SEUs) would occur at up to a rate of once per day.
A system has been designed to operate in such an environment, maintaining
system integrity with consecutive SEUs in the presence of a permanent
processor failure, or featuring high performance with graceful
degradation as failures occur.
A demonstration of the system has been implemented using standard board
level products to execute an attitude and orbit control algorithm
demonstrating high integrity and executing an image compression algorithm
to demonstrate the achievable throughput.
16u30 Neural Controllers and Transputers,
Prof. Andre Bakkers, University of Twente, Enschede, The Netherlands
Adaptive control algorithms are often obtained by numerous assumptions
during the derivation of the formulas. The validity of these algorithms
therefore becomes uncertain. The renewed interest in neural control
systems is twofold. First the neural controller can make decisions based
on vague information and, by adding a learner, it can optimize these
decisions on the basis of decisions made in the past. Secondly, neural
controllers can be realized with relatively simple neural networks.
Recent results using different techniques to update (learn) the weight
factors, also work in favor of a realization of neural controllers.
Finally the advent of the transputer gives a state of the art
implementation of neural networks that perfectly covers the area of
neural control and robotics.
The presentation will conclude with a review of the different learner
algorithms that are available. The implementation of the reinforcement
learner on a transputer network will be illustrated.
17u10 Reception + possibility to visit the exhibition
17u50 Closing of the seminar
Along with the seminar, there is an exhibition, in which manufacturers of
hardware and software for the transputer show and demonstrate their products.
Contributions to this exhibition come from:
Apollo,
Arcobel (Parsytec),
Caplin Cybernetics Corporation (C3),
Inmos,
Intelligent Systems International (CSA),
Inducom Systems (Definicon and Protheus),
Lemni (Microway),
Meiko,
Niche Technology Ltd, (Niche Technology, 3L)
Parsec Developments,
Prentice-Hall books,
Quintek Ltd,
Sension,
Sheldonberry Electronic