jdg@research2.COMputer-science.manchester.ac.UK (Jim Garside) (09/05/88)
Re: Kevin Bertram's request for info - Notes on Inmos IBM board This board occupies 32 locations on the IBM I/O bus, from 0150 through to 016F. This space is divided into two parts, each of which is individually selectable by jump links at the back of the board. The area 0150-F is designated "LADP" and contains the C002 link adaptor as follows:- 0150 Input data register 0151 Output data register 0152 Input status register 0153 Output status register This repeats throughout the block. This area is only selected if pin b6 ("NotLink") is grounded on the back connector. These addresses are also repeated at 0550, 0950 and 0D50. The area 0160-F is designated "SYS" and contains the reset and error status lines. These are mapped as follows:- Write 0160 Reset (Including link adaptor) (Bit 0, active "1") 0161 Analyse (Bit 0, active "1") 0162 (Interrupt on error enable ?????) 0163 Read All locations read the inverse of the error line in D0 These repeat throughout the block and are also repeated at 0560, 0960 and 0D60. This area is only selected if pin b27 ("NotSystem") is grounded on the back connector. These lines are not directly connected to the transputer but appear on the back connector, and may then be jumped onto the transputer system. The address decode is performed by a 16L8 (which does nothing else) and so is easy to customise. On ours the interrupt on error does not seem to exist. Please note that above information is gathered by observation, not from Inmos. Jim Garside