braner@TPOT.TN.CORNELL.EDU (Moshe Braner) (09/14/89)
Any info on the difference between the i860 and the new i960? Actually, the T800 can work on two instructions at once, as long as the first is an FPU op and the second is not and is not dependent on the result of the first. That is a rather strong point for matrix calculations. I presume that the i960 is much further advanced on that line. Does it have, in a sense, two copies of the instruction-execution hardware parts to allow overlapping any two independent instructions? That would be parallelism at a new level. In the future I presume we'll have CPUs that do 4 ops at once, 8, 16.. :-) Anyway, what is coming out from Inmos these days as a response? - Moshe Braner
andy@topologix.UUCP (Andy Pfiffer) (09/14/89)
Excerpted from the 9/11/89 edition of EE Times (without permission): Intel Samples 80960CA by Loring Wirbel: Intel Corp. tomorrow is announcing engineering samples of the 80960CA, the first member of its second generation 960 family of 32-bit embedded processors. The company has been talking about the chip and its architecture for at least a year. The chip is aimed at embedded-controller applications and can run through two or more instructions per clock cycle, giving it a theoretical peak performance of 66 Mips (33 Vax Mips) at 33 MHz. The new 960CA will take an aggressive price/performance stab at competitors, carrying a tag of $325 for the processor in large OEM quantities. ... Wind River Systems and Ready Systems will be major participants in the unveiling, announcing ports of their real-time operating systems, VXWorks and VRTX32. Also in the same issue: Marked Down Transputer SGS-Thomson has decided to slash the going price of its 32-bit Transputer to a mere $2 per 1 Mips - one-third that of its former basement-level entry. ... The move also demonstrates just how serious the company is about driving its microprocessor, still being sold under the Inmos name, into high-volume embedded control applications. ... The strategy hopes to attract the attention of potential users who, believing the part is suited only to real-time computations in parallel-processing environments, have been reluctant to consider the Transputer for high-voulme embedded control applications. Spelling errors, paragraphing, etc. are mine. The new 860 and the newer 960 were developed about the same time and share many of the wins/tradeoffs found in each (dual instruction mode, etc.). There was also mention of a 2 link T425/T800 compatible 32-bit Transputer with 2K of on-chip RAM in the Transputer-related article. -- Andy Pfiffer Topologix, Inc. (303) 421-7700 Trillium Diving Team 4860 Ward Road / Wheat Ridge, CO 80033 "...that's the way a Transputer works, right?"
beersm@TPUTER.TN.CORNELL.EDU (Jim Beers) (09/14/89)
VLIW processors do multiple operations at once, this is what the multiflow machine is, and there is quite a bit of research being done on this, includeing a project here at Cornell. Multiflow gets some incredible proformance this way, but the compilers must be pretty good. the i860, quoting 60 mflops is assuming doing an add and multiply on each cycle.