PVR%autoctrl.rug.ac.be@NSFNET-RELAY.AC.UK (Patrick Van Renterghem / Transputer Lab) (09/14/89)
---------------- BIRA ------------------
Second International Transputer Conference
Transputers for Industrial Applications II
October 23 & 24, 1989
Switel Hotel, Antwerp, Belgium
---------------- BIRA ------------------
Introduction and Objectives:
The Transputer:
The transputer is a single VLSI chip that combines processing power, memory
and communication links for direct connection to other transputers. The
transputer contains a fast integer and floating-point processor and can be
used as a building block for even faster parallel processing systems,
ranging from embedded systems to supercomputers. It is also the only
successful European microprocessor on the world market.
The transputer is an excellent and cost-effective research vehicle for
examining parallel processing, load balancing, routing strategies, ... and
is used by nearly all research institutes worldwide.
Why a Transputer Conference ?
This conference wants to show that the transputer is no longer the
"university's toy", but a mature and useful device for industrial
applications. Indeed, many companies in the U.K., Germany, the U.S. and
Japan have software or hardware products based on the transputer.
Unfortunately, a lot of these applications are military or confidential,
e.g. the nuclear power plant control system, built by CGE-Alsthom in France
using a large number of transputers. Nevertheless, we think we have an
excellent selection of successful transputer applications at this
conference, which will clearly show why and how transputer systems can be
used in industrial applications.
The Exhibition:
Concurrently with the Second International Transputer Conference, we
organize a specialized exhibition in which several manufacturers of hardware
and software for the transputer demonstrate their products and applications.
Several companies have recognized the importance of this conference and will
launch and demonstrate their newest products.
Who Should Attend ?
Because many speakers will address the cost/performance question, the
advantages of using transputers and the actual application they realized,
this conference will benefit both project managers, developers and
technically aware management.
This conference is invaluable for developers of high-speed, highly
integrated or fault-tolerant systems, programmers who want to exploit
parallel processing techniques and everyone who has applications that demand
a very high performance.
Why Should You Attend ?
It is impossible to ignore the transputer when developing or using the
fastest system for your application, whether it is an embedded system, a
robot control or an artificial intelligence application.
Because the emphasis of this conference lies on industrial applications of
transputers, and not on academic talks about what can be done with those
systems, we feel that this conference is extremely useful for everyone
involved in industrial applications.
If you are interested in parallel processing in general, or the transputer
in particular, if you are interested to see what the transputer can do for
your application, or wish to know more about it, then you should attend this
conference.
PROGRAMME: DAY 1 DAY 2
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8.45 - 9.00 : Registration/Welcome
9.20 - 10.00 : Presentation 1 Francis Wray Mr. Zimmerman
10.00 - 10.40 : Presentation 2 Evert Buitenwerf Christian Tricot
10.40 - 11.20 : Coffee/Tea + Exhibition
11.20 - 12.00 : Presentation 3 Hiroshi Takada Simon Taylor
12.00 - 12.40 : Presentation 4 Marc Leman Mr. A. Eppinger
12.40 - 14.00 : Lunch + Coffee/Tea
14.00 - 14.40 : Presentation 5 Kevin Conroy Philip Mattos
14.40 - 15.20 : Presentation 6 Daniel Geypen Tom Wiley
15.20 - 16.00 : Coffee/Tea + Exhibition
16.00 - 16.40 : Presentation 7 Richard Stephens Keith Grimm
16.40 - 17.20 : Presentation 8 Simon Roberts Mr. H. Mirab
17.20 : Exhibition Closing of the semina
r
Conference Dinner (optional)
The following presentations will be given:
Computational Fluid Dynamics on Arrays of Transputers
Francis Wray, Topexpress Ltd., Cambridge, U.K.
Over recent years the demand for high speed computers has risen
dramatically. This has been particularly so in computational fluid
dynamics. With this growth in demand has come an increase in performance.
Technology now allows what was considered to be supercomputer performance a
decade ago to be achieved by a modern desk-top workstation. Although
single-processor computer performance has grown rapidly in the past, this
rate of growth cannot be sustained. The speed of light and the laws of
quantum mechanics impose fundamental physical limits which cannot be
breached. Economic constraints are equally significant: processor, bus and
memory technologies are becoming steadily more exotic and expensive in an
attempt to make them faster.
A different and more cost effective way to increase computing power is to
construct multiple-processor computers. Using transputers, one can replace
a highly expensive supercomputer with several mass-produced microprocessors,
each having their own memory, and whose total processing power is immense.
This assumes one can devise procedures that are amenable to parallelisation.
This presentation describes techniques used by Topexpress for the
implementation of two or threedimensional Euler solvers in parallel on an
array of transputers. Comparisons with existing supercomputers are made and
possible extensions to the completed work are discussed.
An Operational Pattern Recognition System on Transputers
Evert Buitenwerf, PTT Dr. Neher Labs, Leidschendam, The Netherlands
This presentation discusses the migration of an existing pattern recognition
system, written in (sequential) Pascal to a network of transputers. The
software for the transputer version consists of an occam communication
framework and about 17000 lines of original Pascal code. The transputer
pattern recognition system currently runs on a network of 16 T800
transputers.
This work is carried out for the Dutch Postbank NV. The Postbank daily
receives more than half a million mostly handwritten cheques. As the actual
booking process is computerized, these cheques must be encoded in a computer
readable form. Currently, a process combining human and computerized
reading guarantees that this large amount of cheques is processed with a
minimum of coding errors.
Implementation of Neural Networks on Parallel Systems
Hiroshi Takada, Nippon Steel, Japan
This presentation describes a neural network simulator for transputers. It
has a hierarchical software library based on a number of vector functions
which are written in the programming language C and linked symmetrically
with OCCAM procedures. The library enables users to describe any type of
neural network flexibly and easily keeping its high processing speed.
According to a recent test on four transputers, it simulates a complex
neural network of a thousand of squid neurons above ten times faster than a
workstation.
The use of Transputers and Self-Organizing Neural Networks in a Music Recognitio
n Task
Marc Leman, Institute for Psychoacoustics and Electronic Music
and Patrick Van Renterghem, Automatic Control Laboratory
State University of Ghent, Belgium
In this presentation, it is shown how transputers are used for a simulation
task in music research. In particular we focus on the application of
transputers for a model by which higher-level abstract knowledge about
tonality features in a musical environment is achieved by self-organization.
The self-organizing principles adopted are computationally intensive and
transputer networks offer a convenient and cost-effective tool for their
implementation.
First we discuss the problem of music recognition as a fundamental problem
in artificial intelligence research. In the second part of the
presentation, we describe briefly the Kohonen learning vector quantization
algorithm used for knowledge acquisition by self-organization. We will show
that this algorithm has a straightforward parallel implementation when one
neuron of the self-organizing network could be connected to one processing
unit - one transputer. With less transputers than the number of neurons in
the network, we need to divide the matrix of output neurons over a network
of transputers and communicate information between them.
In the remaining part of the presentation we will discuss an implementation
on a four-transputer system (with some results) and a generalization of this
implementation on more than four transputers (the processor farm approach).
Transputers in the North Sea
Kevin Conroy, Conoco Ltd., Viking Gas Terminal, Mablethorpe, U.K.
This presentation will discuss:
- a short overview of controlling unmanned offshore platforms
- the "standard" processor approach
- the reasons for chosing the "university's toy", the transputer
- an initial application of the T212
- the many benefits in the test and debug phases of product development
- the inherent reliability of transputer programs
- further uses of the transputer in
- real-time digital signal processing of vibration signals
on gas turbines
- "Surge Control" on gas compressors
- a summary of how Calcam Control Systems has seen the benefits of
transputers as against Intel processors for embedded industrial
control and monitoring
Transputer Technology in Ultrasonic Data Acquisition Systems
Daniel Geypen, Non-Destructive Testing R & D, Vincotte, Brussels, Belgiu
m
This presentation describes a new concept in ultrasonic data acquisition and
processing equipment for flaw non-destructive evaluation.
A multi-processing algorithm is implemented on a transputer-based processing
unit, together with dedicated synchro-to-digital converters, allowing fast
on-line data processing. To minimize transfer and storage delays, data
reduction is achieved through the new multi-peak detection software.
A modular structure, with various components communicating through an
IEEE-488 bus, permits the system to connect easily to other existing or
future equipment.
The performance of the system is illustrated by some examples of
applications in nuclear power plants.
Implementation of a Frame Rate 3D Object Tracker
Richard Stevens, Computing Devices Company Ltd., Cambridge, U.K.
In this presentation, a system for tracking the three-dimensional motion of
objects in real time is described. The system is interesting because it
performs frame rate image processing without the need for any special
purpose hardware. Because it does not require any preprocessing of the
image, it can be implemented using only a network of a few transputers.
Segmentation of images is necessarily computationally intensive, due to the
large amount of data that has to be processed. Systems that have to operate
in a real-time environment almost exclusively use dedicated hardware. These
systems are expensive and inflexible, and if a software implementation is
possible, substantial savings can be made. With the advent of processors
such as the transputer, this is becoming more and more feasible.
The Role of the VMEbus in Transputer-Based Real-Time Systems
Simon Roberts, Cambridge RISC Machines, Cambridge, U.K.
In this presentation, a short overview of the salient features of the VMEbus
will be presented, followed by a description of ways of interfacing a
transputer network to the VMEbus.
A transputer network interfaced to the VMEbus as a slave is an effective
means of adding additional processing power to an existing VMEbus master
such as a 68030. The presentation will describe how existing applications,
running under the OS9/680x0 operating system, may be ported to the
transputer, whilst retaining full access to the facilities and I/O devices
of the OS9 system.
If one node of a transputer network is given access to the VMEbus as a
master, VMEbus I/O boards may be controlled directly. This allows a
completely transputer-based real-time system to be constructed which has
access to the very wide range of high quality VMEbus I/O boards that are
available. A brief discussion of some of the implementation issues will be
presented, including how the VMEbus interrupt mechanism can be mapped onto
the transputer's single event input and how 16-bit VMEbus transfers can be
accomodated.
The presentation will conclude with a short description of some example
applications.
Transputer Activities at Volkswagen Research
Mr. P. Zimmermann, Volkswagen AG, Wolfsburg, Germany
Transputers have been detected to be a good tool to efficiently solve
problems in the field of simulation and control. Two applications will be
presented to demonstrate the advantages of transputer networks.
Visual simulation is one of the most important and most expensive parts of a
driving simulator. Available systems on the market are strongly hardware
oriented. The transputer approach offers the possibility to develop a more
software oriented visual system, which will meet the requirements for a
driving simulation with reduced costs. This presentation gives an overview
about requirements, algorithms and current state of development.
An active vehicle suspension system needs a portable board computer for
controlling the valves of the hydraulic actuators. This is done by a
shock-resistant AT-compatible host computer, coupled with a network of T800
and T212 transputers. The latter build the connection to the Analog to
Digital Converters.
Archipel: 2 Examples of Industrial Applications of Transputers
Christian Tricot, Archipel, Meylan, France
We present two of our customer's industrial applications using transputers.
Both are original and show a new way of using transputers.
The first concerns the image synthesis to produce movies. The parallelism is
introduced on pixel computation and facet presentation. The architecture is
based on an en-ring of two transputers per node. This software is used at an
industrial level to produce the movie image per image. Some of these movies
have been produced for French TV channels (Canal+, La 5).
The second one is a simulation of low density gas in the high atmosphere
using the Bird principle of simulation. This software is a sort of engine
allowing the simulation of a large range of problems. A piece of atmosphere
(experience area) is divided into cells and grouped into slices. The soft-
ware manages the behaviour of molecules between the cells and slices. Some
cells can contain part of an object. A flux of molecules can be introduced
from one edge into the experience area. The results of different simulations
are very impressive. With this application the scientist can get results in
fields for which no other method is possible. This application is completed
with a 3D visualisation method.
Applications of Parallel Computing in Manufacturing Systems
Simon Taylor, Leeds Polytechnic, Leeds, U.K.
Companies wishing to invest in computer based manufacturing systems face
heavy restrictions in the level of investment in expertise, money and time.
This paper shows how these restrictions can be reduced by examining how the
Communicating Sequential Processes model, and its hardware and software
realisation of the Transputer and Occam, can be applied to manufacturing
systems.
The transputer offers low cost, high performance computing power with all of
the advantages that the process model offers over conventional sequential
approaches. The transputer needs little supporting circuitry and it easily
connected to other transputers. Consequently, it can be easily used in the
design of highly modular control and monitoring equipment. Additionally,
the embedded code in the transputer has been formally proven, and can
therefore further support the use of formal methods in system design and
specification.
ASCET - An Integrated, Interactive Control Engineering Tool for
Nonlinear Systems based on Fast Object-Oriented Simulation on a
Multi-Transputer System
Mr. A. Eppinger, Robert Bosch GmbH, Stuttgart, Germany
This presentation will cover the concepts and actual status of the ASCET
(Advanced Simulation and Control Engineering Tool) project which may be
characterized by three major features:
- starting from system representation all the way down to the simulation,
ASCET follows the principle of "Object-Orientation". This gives it
analog-computer like features of structure-conversation and interactivity.
Transputers can be interpreted as the hardware representation of objects
thus being very well suited for object-oriented simulation.
- ASCET integrates analysis and design methods in a unique modular approach
using the same user interface as for simulation.
- Simulation is powerful enough to provide real-time simulation capabilities
in the KHz range. Through process interfaces, real hardware components may
be included into the design process ("hardware-in-the-loop").
Signal Processing for Satellite Communications using the Transputer
Philip Mattos, Inmos Ltd., Bristol, U.K.
Spread spectrum communication conventionally requires complex hardware to
extract the signal before it can be demodulated by a phase locked loop and
interpreted by a micro. The speed of the transputer allows it to perform
all three tasks in software, even for complex applications as the GPS
(global positioning system) navigation system, where up to five separate
satellite signals must be handled simultaneously. In addition, the time to
achieve synchronisation with the satellite is greatly reduced due to the
ability to operate at maximum processor speed, rather than incoming data
rate.
Using the transputer reduces the system hardware to a simple superhet
downconversion/gain block with worst case acquisition times of seconds,
rather than tens of minutes experienced by hardware systems. After the
receiver, a 6 component CPU/memory system supports signal processing,
calculation and user interface, making a handheld navigation or
communications unit possible.
The Transputer Data Processing Experiment in the UOSAT-E satellite
Tom Wiley, Francisco Gomez-Molinero, European Space Agency, ESTEC,
Noordwijk, The Netherlands
This presentation describes the Transputer Data Processing Experiment (TDPE)
carried out by the European Space Agency within the Technology Demonstration
Programme. TDPE is an in-flight facility carried by the University of
Surrey UOSAT-E satellite. UOSAT-E is due for launching by November 1989
using an Ariane IV rocket.
Several experiments are intended to be carried out with the Transputer
Facility. These are based on our own experience in image compression as
well as the fault-tolerant multitransputer configurations derived from the
work performed by Smith Associates for ESTEC.
The experiments designed by ESTEC are meant to:
- Investigate the effects of the space radiation on the transputers.
- Demonstrate how a fault-tolerant multitransputer configuration
can cope with the problem of SEU in high integrity applications.
- Demonstrate the performance of the Transputer for on-board image
compression.
The paper presents the multitransputer architecture and explains the
experiments intended to be carried out in the first phase.
Utilization of Transputer Networks in a Free Flying Autonomous Robot
Keith Grimm, NASA Johnson Space Center, Houston, Texas, U.S.A.
The Extra-Vehicular Activity (EVA) Retriever robot has been developed as a
ground demonstration project and a precursor to a flight experiment at the
Johnson Space Center. It utilizes an array of twenty transputers to perform
vision processing and sensor fusion, mission control and arbitration, world
model construction and update, crew interface support, inertial measurements
data processing, and robot arm control. Currently the robot can execute a
simple target track and retrieval scenario.
Transputers for Robot Control
H. Mirab, Dept. of Mechanical Engineering, University of Glasgow, U.K.
A transputer network, interfaced to a robot manipulator is used to study the
performance of the transputers for robot control applications and to model
validation of the robot. Different parallel architectures are utilized to
achieve required system performance with a reduced computational time.
Advanced real-time control algorithms are needed in robotic applications to
deal with the non-linear system dynamics and the uncertainties in the robot
model. The non-linearities are due to Coriolis and Centrifugal reaction
forces between joints and also inertia and gravity loading effects.
The manipulator's physical parameters, instantaneous joint configuration and
the load it is carrying will affect the interaction torques and forces.
The computational speeds needed for implementation of control algorithms
which will take these non-linearities into account, resulting in improved
performance, can be achieved by exploiting the power of parallel computing.
PARTICIPATION FEE:
-----------------
The fee for the conference/exhibition is:
13500 BEF for members of the BIRA/IBRA
15000 BEF for non-members
6500 BEF for teachers and assistants
including coffee/tea, lunches, proceedings, admission to the conference and
exhibition room
Payments, in BEF (= Belgian Francs) only, to be made on receipt of an
invoice from the BIRA Office. A special price can be obtained for students
(please contact the BIRA Office for conditions).
Each participant will receive an admission badge which will authorise
access to the Conference, the Lunchroom and the Exhibition. It must be worn
throughout the whole seminar period.
Registrations will close on wednesday October 18, 1989. CONFIRMATIONS WILL
NOT BE SENT.
Cancellation is possible before October 18, 1989. In this case a charge of
60 % will be reimbursed. After October 18, 1989 the whole registration fee
must be reimbursed, in this case we will send you the proceedings and the
list of participants, following the Conference.
An exquisite dinner in the restaurant of the Switel Hotel on Monday 23
October. Separate registration is required - Fees: 1250 BEF/person.
Rooms can be booked on your behalf in local hotels (please contact the
Antwerp Tourist Office, tel: +32 3 232 01 03) or directly at the Switel
hotel (tel: +32 3 231 67 80, fax: +32 3 233 02 90). Please refer to the
Conference for a special rate ! The Switel Hotel is situated nearby the
Antwerp Central Railway Station. Parking is available in the underground
carpark. Address: Copernicuslaan 2, 2018 Antwerp, Belgium.
The number of participants will be limited to 250.
Exhibitors can still rent space in the exhibition area. Prices are
reasonable (approx. 2500 BEF/m2/day).
To get more information, write, call or fax:
The BIRA Office: | The Scientific Coordinator:
|
Luk Pauwels | Patrick Van Renterghem
The BIRA Office, | Univ. of Ghent/Automatic Control Lab,
Desguinlei 214, | Grotesteenweg Noord 2,
2018 Antwerpen | 9710 Ghent-Zwijnaarde
Tel: +32 3 216 09 96 | +32 91 22 57 55 ext. 313
Fax: +32 3 216 06 89 | +32 91 22 85 91
Email: ---- | pvr@bgerug51.bitnet
===========================================================================
REGISTRATION FORM:
-----------------
Second International Transputer Conference
BIRA - Belgian Institute for Automatic Control
Antwerp, 23 and 24 October 1989.
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