CDRIW@cr83.staffordshire-polytechnic.ac.uk (10/11/89)
Grain for thought: Performance with programmability is the target. Surely the point is to keep the memory as busy as possible? Cycles-per-instruction is not the issue, but accesses-per-memory-location. Microprocessors in general are too big: A 10 mip processor with 10 Meg of RAM accesses each location only once per second. What a waste of RAM! The `grain-y-ness' of occam is great, with its 3 primative processes, hierachical process structure and lack of shared memory. When applied to transputers however, the niceness begins to break down. Distributing a program on transputers imposes a flat process structure, with a limit of 4 channels per process. Processes with internal parallelism (i.e. communication) run time-sliced. What is required is transputers with internal transputers! How about a (size 1) TRAM with 4 T2s arranged in a tetrahedral structure, although RAM would be a big problem here. Even more interesting would be 4 (say) transputers on the same die. In this case the intra-die link engines need not be serial but 8- (or why not 32-) bit parallel -- this would really get the data flowing. We need systems with *much* higher processor-communication / RAM. This may require smaller processors with better communication (looks very neural-nettish, eh?)
lindsay@watnext.waterloo.edu (Lindsay Patten) (10/12/89)
CDRIW@cr83.staffordshire-polytechnic.ac.uk:
> Surely the point is to keep the memory as busy as possible?
Why? I would think that it would be do get as much done as possible. No?
Lindsay Patten "People are package deals - No substitutions allowed"
Pattern Analysis & Machine Intelligence Group lindsay@watnext
Department of Systems Design Engineering lindsay@watnext.waterloo.edu
University of Waterloo {utai|decvax|uunet}!watmath!watnext!lindsayhjm@cernvax.UUCP (Hubert Matthews) (10/12/89)
In article <11873@watcgl.waterloo.edu> lindsay@watnext.waterloo.edu (Lindsay Patten) writes: >CDRIW@cr83.staffordshire-polytechnic.ac.uk: >> Surely the point is to keep the memory as busy as possible? > >Why? I would think that it would be do get as much done as possible. No? Since the major cost in modern computers is memory, then this is not an unreasonable viewpoint. CPUs are cheap in comparison to memory. Perhaps you might phrase your answer better as: "I would think that it would be better to get as much done as possible for a given cost". You can always throw more hardware at a problem and make it go faster, but it may not be cost-effective. In short, engineering is full of trade-offs. Speed v. cost is just one of the obvious ones. -- Hubert Matthews ...helping make the world a quote-free zone... hjm@cernvax.cern.ch hjm@vxomeg.decnet.cern.ch ...!mcvax!cernvax!hjm